diff options
| author | Jonathan Zhang <jonzhang@fb.com> | 2020-01-16 11:16:45 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-06 08:19:59 +0000 |
| commit | 8f89549d3c7d41643337662947cfdb2329bd030b (patch) | |
| tree | 81d337d1e0bc655d82f47ba8808f42713942dc6a /src/soc/intel/Kconfig | |
| parent | e425a09d6a0016e128373941ee1cf223a528a0fc (diff) | |
| download | coreboot-8f89549d3c7d41643337662947cfdb2329bd030b.tar.xz | |
soc/intel: Add Intel Xeon Scalable Processor support
This patch adds support for Intel Xeon-SP.
This patch is developed and verified with Skylake Scalable
Processor, which is a processor in Xeon-SP family. The code
is expected to be reusable for future geneations of Xeon-SP
processors, and will be updated with smaller targeted
patches accordingly, to add support for additional Xeon-SP
processors, to add features, and to improve the code base.
The Skylake-SP FSP is based on FSP 2.0. The FSP is a
proof-of-concept build. The binary is not shared in public,
when this patch is upstreamed.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Signed-off-by: Reddy Chagam <anjaneya.chagam@intel.com>
Tested-by: johnny_lin@wiwynn.com
Change-Id: Idc9c3bee17caf8b4841f0bc190cb1aa9d38fc23e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38548
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/soc/intel/Kconfig')
| -rw-r--r-- | src/soc/intel/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/Kconfig b/src/soc/intel/Kconfig index e8935b9fd5..47efc4d18f 100644 --- a/src/soc/intel/Kconfig +++ b/src/soc/intel/Kconfig @@ -9,6 +9,7 @@ source "src/soc/intel/quark/Kconfig" source "src/soc/intel/skylake/Kconfig" source "src/soc/intel/icelake/Kconfig" source "src/soc/intel/tigerlake/Kconfig" +source "src/soc/intel/xeon_sp/Kconfig" # Load common config source "src/soc/intel/common/Kconfig" |