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| author | Furquan Shaikh <furquan@google.com> | 2014-06-26 14:24:42 -0700 |
|---|---|---|
| committer | Marc Jones <marc.jones@se-eng.com> | 2015-03-04 18:23:46 +0100 |
| commit | 650d11ce94dea9ecc3fee3c2eb4dcb423af3f503 (patch) | |
| tree | 21494062dad07db23cd5255f34d1f3cccf99762c /src/soc/intel/Makefile.inc | |
| parent | d42b3fc6a9adda4a20cd331b27117d95c70887a4 (diff) | |
| download | coreboot-650d11ce94dea9ecc3fee3c2eb4dcb423af3f503.tar.xz | |
coreboot rush: Add dram init code
Add support for initializing dram within romstage. This is an essential before we
move to the armv8 core.
BUG=None
BRANCH=None
TEST=Compiles succesfully for rush. Tried writing to and reading value from the
base of sdram and it worked fine. Also tested with primitive_memtest CL:
https://chromium-review.googlesource.com/#/c/186309/5
Original-Change-Id: I67ec04c766e249c9727b0cf2ba216522c862c2f5
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/205823
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 33c468b16e7ccd8cf9266d6a9ca30c02da104821)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Change-Id: I4baface2c109ca74f85f43a25508677c46c64159
Reviewed-on: http://review.coreboot.org/8574
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc/intel/Makefile.inc')
0 files changed, 0 insertions, 0 deletions