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| author | Martin Roth <martin@coreboot.org> | 2021-05-04 12:54:18 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-05-07 02:54:22 +0000 |
| commit | 4f27dde72aaaa203113fb29acca6fc3b88b89de4 (patch) | |
| tree | b7e06ea98d2e275d677f5026a43ff9c56bac31aa /src/soc/intel/alderlake/pmc.c | |
| parent | d233b1a8310ff79f9d4d1ce0cd9285b1a668846d (diff) | |
| download | coreboot-4f27dde72aaaa203113fb29acca6fc3b88b89de4.tar.xz | |
mb/google/mancomb: Update AMDFW config file
Mancomb uses DDR4 SODIMMs, but the default cezanne configuration is for
the LPDDR4 version. This changes to use SODIMMS.
Further changes may be needed for platform customization, so I put the
config file in variants/baseboard instead of the root mancomb directory.
BUG=b:187094481
TEST=Build only
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Icc4dc8aec2053cb177765f57e57cac7a099508fe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/intel/alderlake/pmc.c')
0 files changed, 0 insertions, 0 deletions