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authorAngel Pons <th3fanbus@gmail.com>2021-02-19 22:01:55 +0100
committerAngel Pons <th3fanbus@gmail.com>2021-03-01 19:43:04 +0000
commit5d98dabb4e10cb93cae9b43f47dc3c4fe1fefd5f (patch)
tree195662824e02eed68659fd6a6b54087ac8439cbb /src/soc/intel/alderlake
parent43026ba81966a9f065435a68a6ca8bd69005fe19 (diff)
downloadcoreboot-5d98dabb4e10cb93cae9b43f47dc3c4fe1fefd5f.tar.xz
soc/intel: Drop `bootblock_cpu_init()` function
Just call `fast_spi_cache_bios_region()` directly instead. Change-Id: I99f6ed4cf1a5c49b078cfd05e357c2d4c26ade45 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50952 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake')
-rw-r--r--src/soc/intel/alderlake/Makefile.inc1
-rw-r--r--src/soc/intel/alderlake/bootblock/bootblock.c3
-rw-r--r--src/soc/intel/alderlake/bootblock/cpu.c20
-rw-r--r--src/soc/intel/alderlake/include/soc/bootblock.h1
4 files changed, 2 insertions, 23 deletions
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc
index fc3d63e0fa..bb731a1b14 100644
--- a/src/soc/intel/alderlake/Makefile.inc
+++ b/src/soc/intel/alderlake/Makefile.inc
@@ -15,7 +15,6 @@ all-y += spi.c
all-y += uart.c
bootblock-y += bootblock/bootblock.c
-bootblock-y += bootblock/cpu.c
bootblock-y += bootblock/pch.c
bootblock-y += bootblock/report_platform.c
bootblock-y += espi.c
diff --git a/src/soc/intel/alderlake/bootblock/bootblock.c b/src/soc/intel/alderlake/bootblock/bootblock.c
index 96e6268f74..b8086a42ab 100644
--- a/src/soc/intel/alderlake/bootblock/bootblock.c
+++ b/src/soc/intel/alderlake/bootblock/bootblock.c
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h>
+#include <intelblocks/fast_spi.h>
#include <intelblocks/systemagent.h>
#include <intelblocks/tco.h>
#include <intelblocks/uart.h>
@@ -16,7 +17,7 @@ void bootblock_soc_early_init(void)
{
bootblock_systemagent_early_init();
bootblock_pch_early_init();
- bootblock_cpu_init();
+ fast_spi_cache_bios_region();
pch_early_iorange_init();
if (CONFIG(INTEL_LPSS_UART_FOR_CONSOLE))
uart_bootblock_init();
diff --git a/src/soc/intel/alderlake/bootblock/cpu.c b/src/soc/intel/alderlake/bootblock/cpu.c
deleted file mode 100644
index 4225358de5..0000000000
--- a/src/soc/intel/alderlake/bootblock/cpu.c
+++ /dev/null
@@ -1,20 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/*
- * This file is created based on Intel Alder Lake Processor PCH Datasheet
- * Document number: 621483
- * Chapter number: 7
- */
-
-#include <intelblocks/fast_spi.h>
-#include <soc/bootblock.h>
-
-void bootblock_cpu_init(void)
-{
- /*
- * Alderlake platform doesn't support booting from any other media
- * than SPI flash and on IA platform SPI is memory mapped hence
- * enabling temporary caching of memory-mapped spi boot media.
- */
- fast_spi_cache_bios_region();
-}
diff --git a/src/soc/intel/alderlake/include/soc/bootblock.h b/src/soc/intel/alderlake/include/soc/bootblock.h
index 087d29f741..0cf334fe09 100644
--- a/src/soc/intel/alderlake/include/soc/bootblock.h
+++ b/src/soc/intel/alderlake/include/soc/bootblock.h
@@ -4,7 +4,6 @@
#define _SOC_ALDERLAKE_BOOTBLOCK_H_
/* Bootblock pre console init programming */
-void bootblock_cpu_init(void);
void bootblock_pch_early_init(void);
/* Bootblock post console init programming */