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authorFurquan Shaikh <furquan@google.com>2021-02-03 23:10:22 -0800
committerPatrick Georgi <pgeorgi@google.com>2021-02-06 09:05:57 +0000
commit5f262be24c2ae43451751261ecabdc825a167af0 (patch)
tree47edaf4996622cec4a12c4e9a157698e7cb09ff7 /src/soc/intel/alderlake
parent1a5f25ea7f12d76425c6b66b3ff5cca3bb496296 (diff)
downloadcoreboot-5f262be24c2ae43451751261ecabdc825a167af0.tar.xz
intel: Rename config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI
This change renames config FSP_USES_MP_SERVICES_PPI to MP_SERVICES_PPI in preparation to allow V1 and V2 versions of MP services PPI. TEST=Verified that timeless build for brya, volteer, icelake_rvp, elkhartlake_crb and waddledee shows no change in generated coreboot.rom Change-Id: I04acf1bc3a3739b31d6e9d01b6aa97542378754f Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50275 Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake')
-rw-r--r--src/soc/intel/alderlake/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 0474750862..91a3f65d25 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -34,12 +34,12 @@ config CPU_SPECIFIC_OPTIONS
select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
select IOAPIC
select INTEL_TME
+ select MP_SERVICES_PPI
select MRC_SETTINGS_PROTECT
select PARALLEL_MP
select PARALLEL_MP_AP_WORK
select MICROCODE_BLOB_UNDISCLOSED
select PLATFORM_USES_FSP2_2
- select FSP_USES_MP_SERVICES_PPI
select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select PMC_LOW_POWER_MODE_PROGRAM