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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-11-10 14:19:06 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-03 09:03:55 +0000 |
| commit | d828aed1ddc46404828597e39d366466efa485b1 (patch) | |
| tree | 4e0cb786b29ef6cb8a6a0ffc14e3078bfaa5d201 /src/soc/intel/alderlake | |
| parent | 3fca2c79224f402f11f0b5fac0c5b267c342f6de (diff) | |
| download | coreboot-d828aed1ddc46404828597e39d366466efa485b1.tar.xz | |
soc/intel/alderlake: Add some helper macros for accessing TCSS DMA devices
Change-Id: I5cf54ae0456147c88b64bd331d4de5ca2e941f8a
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47413
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake')
| -rw-r--r-- | src/soc/intel/alderlake/include/soc/pci_devs.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/include/soc/pci_devs.h b/src/soc/intel/alderlake/include/soc/pci_devs.h index 098c31daa5..6a114ae61c 100644 --- a/src/soc/intel/alderlake/include/soc/pci_devs.h +++ b/src/soc/intel/alderlake/include/soc/pci_devs.h @@ -54,6 +54,8 @@ #define SA_DEV_TBT3 PCI_DEV(0, SA_DEV_SLOT_TBT, 3) #define SA_DEV_SLOT_TCSS 0x0d +#define NUM_TCSS_DMA_FUNCTIONS 2 +#define SA_DEVFN_TCSS_DMA(x) PCI_DEVFN(SA_DEV_SLOT_TCSS, ((x) + 2)) #define SA_DEVFN_TCSS_XHCI PCI_DEVFN(SA_DEV_SLOT_TCSS, 0) #define SA_DEVFN_TCSS_XDCI PCI_DEVFN(SA_DEV_SLOT_TCSS, 1) #define SA_DEVFN_TCSS_DMA0 PCI_DEVFN(SA_DEV_SLOT_TCSS, 2) |