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| author | Alexandru Gagniuc <alexandrux.gagniuc@intel.com> | 2016-02-24 15:08:23 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-04-11 16:26:29 +0200 |
| commit | 0581a6759dea55d21ff7d75da902a608542a4918 (patch) | |
| tree | 44f469592a73524dea036ddab6b969a938f24454 /src/soc/intel/apollolake/Kconfig | |
| parent | b8671eafde839cb93aa4af3888f2fedf59401899 (diff) | |
| download | coreboot-0581a6759dea55d21ff7d75da902a608542a4918.tar.xz | |
soc/intel/apollolake: Implement SPI controller driver
Implement flash read, write, and erase functionality using the
hardware sequencing capabilities of the SOC. Due to changes in
hardware requirements, the flash chip must be probed differently
than on previous platforms (details explained in comments).
Note that this is a minimal implementation, and does not provide all
the bells and whistles.
Change-Id: I6dcc3bc36dfce61927d126d231a16d485acb1bdc
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14246
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/Kconfig')
| -rw-r--r-- | src/soc/intel/apollolake/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index efebe513c2..30ee7e57a1 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -32,6 +32,7 @@ config CPU_SPECIFIC_OPTIONS select REG_SCRIPT select RELOCATABLE_RAMSTAGE # Build fails if this is not selected select SOC_INTEL_COMMON + select SPI_FLASH select UDELAY_TSC select TSC_CONSTANT_RATE select UDELAY_TSC |