diff options
author | Rizwan Qureshi <rizwan.qureshi@intel.com> | 2017-04-26 21:06:35 +0530 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-05-18 06:07:15 +0200 |
commit | ae6a4b6d3ca60fc697103cbdaaf5df84502f554e (patch) | |
tree | 60053ac5506eb928c49bdd958f2648972a6c52ac /src/soc/intel/apollolake/Makefile.inc | |
parent | 36b09b8a6c3367dded5c3f0c6a1dc1d16d9a1335 (diff) | |
download | coreboot-ae6a4b6d3ca60fc697103cbdaaf5df84502f554e.tar.xz |
intel/common/block/i2c: Add common block for I2C and use the same in SoCs
In the intel/common/block
* Move I2C common code from intel/common to intel/common/block.
* Split the code into common, early init and post mem init stages and put it
in lpss_i2c.c, i2c_early.c and i2c.c respectively.
* Declare functions for getting platform specific i2c bus config and
mapping bus to devfn and vice versa, that have to be implemented by SoC.
In skylake/apollolake
* Stop using code from soc/intel/common/lpss_i2c.c.
* Remove early i2c initialization code from bootblock.
* Refactor i2c.c file to implement SoC specific methods
required by the I2C IP block.
Change-Id: I4d91a04c22e181e3a995112cce6d5f0324130b81
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/19468
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/Makefile.inc')
-rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 50d323fb4a..9b1f44022d 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -13,6 +13,7 @@ bootblock-y += bootblock/bootblock.c bootblock-y += car.c bootblock-y += gpio.c bootblock-y += heci.c +bootblock-y += i2c.c bootblock-y += lpc_lib.c bootblock-y += mmap_boot.c bootblock-y += pmutil.c @@ -25,7 +26,7 @@ romstage-y += car.c romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage.c romstage-y += gpio.c romstage-y += heci.c -romstage-y += i2c_early.c +romstage-y += i2c.c romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c romstage-y += lpc_lib.c romstage-y += memmap.c @@ -83,7 +84,7 @@ postcar-y += tsc_freq.c postcar-$(CONFIG_FSP_CAR) += exit_car_fsp.S verstage-y += car.c -verstage-y += i2c_early.c +verstage-y += i2c.c verstage-y += heci.c verstage-y += memmap.c verstage-y += mmap_boot.c |