diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-08-03 12:14:20 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-04 21:42:29 +0000 |
commit | c05a3f86ab65491bc24e1da22d8b667259acee5a (patch) | |
tree | b4d6ffa80e77338248fd1bfda5276453044394e2 /src/soc/intel/apollolake/acpi.c | |
parent | 9dfd6150bd30657c93e4edd21c8cec77c5fcfe02 (diff) | |
download | coreboot-c05a3f86ab65491bc24e1da22d8b667259acee5a.tar.xz |
soc/intel/apollolake/acpi.c: Add RMRRs after all DRHDs
The VT-d architecture specification (Doc. D51397-011, Rev. 3.1) says:
BIOS implementations must report these remapping structure types in
numerical order. i.e., All remapping structures of type 0 (DRHD)
enumerated before remapping structures of type 1 (RMRR), and so forth.
So, update the corresponding code to adhere to the specification.
Change-Id: I4ee3ae6c45e2a2c921fbccbb62b853e4a141a58d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44110
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/soc/intel/apollolake/acpi.c')
-rw-r--r-- | src/soc/intel/apollolake/acpi.c | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c index 96a142a89e..ee1a543728 100644 --- a/src/soc/intel/apollolake/acpi.c +++ b/src/soc/intel/apollolake/acpi.c @@ -171,19 +171,15 @@ static unsigned long soc_fill_dmar(unsigned long current) unsigned long tmp; /* IGD has to be enabled, GFXVTBAR set and enabled. */ - if (is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten) { + const bool emit_igd = is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten; + + /* First, add DRHD entries */ + if (emit_igd) { tmp = current; current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar); current += acpi_create_dmar_ds_pci(current, 0, 2, 0); acpi_dmar_drhd_fixup(tmp, current); - - /* Add RMRR entry */ - tmp = current; - current += acpi_create_dmar_rmrr(current, 0, - sa_get_gsm_base(), sa_get_tolud_base() - 1); - current += acpi_create_dmar_ds_pci(current, 0, 2, 0); - acpi_dmar_rmrr_fixup(tmp, current); } /* DEFVTBAR has to be set and enabled. */ @@ -210,6 +206,15 @@ static unsigned long soc_fill_dmar(unsigned long current) acpi_dmar_drhd_fixup(tmp, current); } + /* Then, add RMRR entries after all DRHD entries */ + if (emit_igd) { + tmp = current; + current += acpi_create_dmar_rmrr(current, 0, + sa_get_gsm_base(), sa_get_tolud_base() - 1); + current += acpi_create_dmar_ds_pci(current, 0, 2, 0); + acpi_dmar_rmrr_fixup(tmp, current); + } + return current; } |