summaryrefslogtreecommitdiff
path: root/src/soc/intel/apollolake/acpi/southbridge.asl
diff options
context:
space:
mode:
authorZhao, Lijian <lijian.zhao@intel.com>2016-02-01 16:41:59 -0800
committerAaron Durbin <adurbin@chromium.org>2016-04-28 05:46:00 +0200
commit164e8f1d9b9a36ccca2feefa0e2172ac0c3254c3 (patch)
treee442d1a021a4738e32e89cc040b61f41c652525d /src/soc/intel/apollolake/acpi/southbridge.asl
parent0c85b7f4d7180c9307fd95bb887791d4231397a5 (diff)
downloadcoreboot-164e8f1d9b9a36ccca2feefa0e2172ac0c3254c3.tar.xz
soc/intel/apollolake: Add GPIO devices
Add GPIO controller in ACPI device description. GPIO controller driver is probed in kernel and all the pins in the banks are showing respective values. Change-Id: I0512cfec872113b15fd204ec3b95efeac87f694a Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com> Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com> Reviewed-on: https://review.coreboot.org/14478 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/acpi/southbridge.asl')
-rw-r--r--src/soc/intel/apollolake/acpi/southbridge.asl3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl
index 46d701328a..0584439a2a 100644
--- a/src/soc/intel/apollolake/acpi/southbridge.asl
+++ b/src/soc/intel/apollolake/acpi/southbridge.asl
@@ -20,3 +20,6 @@
/* PCI IRQ assignment */
#include "pci_irqs.asl"
+
+/* GPIO controller */
+#include "gpio.asl"