diff options
| author | Zhao, Lijian <lijian.zhao@intel.com> | 2016-01-20 13:02:38 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-04-11 18:23:08 +0200 |
| commit | 51d43fc9c5aab428d589b602759476d716fbea6e (patch) | |
| tree | f34c04ce843bc18cb0c85923489d5d51b5ae8eef /src/soc/intel/apollolake/acpi/southbridge.asl | |
| parent | 30461a91977d6770bb3ec6c378a21afe2616f3d7 (diff) | |
| download | coreboot-51d43fc9c5aab428d589b602759476d716fbea6e.tar.xz | |
soc/intel/apollolake: Add lpss dsdt entry
Add southbridge and LPSS device DSDT table.
Change-Id: I0607398408900d8c5d543ecd5e5d4830d2a70bf1
Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/14218
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/acpi/southbridge.asl')
| -rw-r--r-- | src/soc/intel/apollolake/acpi/southbridge.asl | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/acpi/southbridge.asl b/src/soc/intel/apollolake/acpi/southbridge.asl new file mode 100644 index 0000000000..4a7757bd32 --- /dev/null +++ b/src/soc/intel/apollolake/acpi/southbridge.asl @@ -0,0 +1,14 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Intel Corp. + * (Written by Lance Zhao <lijian.zhao@intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/* LPSS device */ +#include "lpss.asl"
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