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| author | Aamir Bohra <aamir.bohra@intel.com> | 2019-02-01 18:15:17 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-02-05 05:35:38 +0000 |
| commit | fc63b8bbc0d2f16bc2693c23c50db531382b6ade (patch) | |
| tree | feb6a1066b77627bb09cef967fa571982d1fd0cc /src/soc/intel/apollolake/acpi/xhci.asl | |
| parent | f56249ba0b1cf4bf83d93f3d717d3eb8a0624ff2 (diff) | |
| download | coreboot-fc63b8bbc0d2f16bc2693c23c50db531382b6ade.tar.xz | |
mb/google/hatch: Add USB port capability ACPI support for USB2 port10
This implementation adds support to create ACPI package for USB port
capability (_UPC) and physical location of device (_PLD) for USB2 port 10.
BUG:b:123375275
TEST:Verify _UPC and _PLD ACPI packages gets published for USB2 Port 10
in SSDT and BT is functional in discrete and integrated mode.
Change-Id: Ifeab24505a700e8e4677be20074c7d0400769cec
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/31197
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/acpi/xhci.asl')
0 files changed, 0 insertions, 0 deletions