diff options
author | Alexandru Gagniuc <alexandrux.gagniuc@intel.com> | 2016-05-16 16:27:45 -0700 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2016-05-19 18:28:07 +0200 |
commit | f5babed62fa7e94fddd16940f5c476866b4c41be (patch) | |
tree | 99b63e6007f90af601c251be83dd63a7b2bd3013 /src/soc/intel/apollolake/bootblock | |
parent | ff196b62274abd55c62083efe89f43085c1143d3 (diff) | |
download | coreboot-f5babed62fa7e94fddd16940f5c476866b4c41be.tar.xz |
soc/apollolake: Pass earliest timestamp to timestamp_init
We have a timestamp from before cache-as-ram setup saved in the MMX
registers. Recover that timestamp, and use it as the base timestamp
rather than letting lib/bootblock.c use a late timestamp.
This allows more accurate profiling of the boot flow, since CAR setup
time is no longer excluded from the timing information.
Change-Id: I055092c600438c5260ab67509434a38f1eb77fe4
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Reviewed-on: https://review.coreboot.org/14863
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/bootblock')
-rw-r--r-- | src/soc/intel/apollolake/bootblock/bootblock.c | 5 | ||||
-rw-r--r-- | src/soc/intel/apollolake/bootblock/cache_as_ram.S | 6 |
2 files changed, 9 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c index 77d98d98be..82794327c9 100644 --- a/src/soc/intel/apollolake/bootblock/bootblock.c +++ b/src/soc/intel/apollolake/bootblock/bootblock.c @@ -26,6 +26,7 @@ #include <soc/northbridge.h> #include <soc/pci_devs.h> #include <soc/uart.h> +#include <timestamp.h> static const struct pad_config tpm_spi_configs[] = { PAD_CFG_NF(GPIO_106, NATIVE, DEEP, NF3), /* FST_SPI_CS2_N */ @@ -53,7 +54,7 @@ static void enable_pm_timer(void) wrmsr(MSR_EMULATE_PM_TMR, msr); } -void asmlinkage bootblock_c_entry(void) +void asmlinkage bootblock_c_entry(uint32_t tsc_hi, uint32_t tsc_lo) { device_t dev = NB_DEV_ROOT; @@ -67,7 +68,7 @@ void asmlinkage bootblock_c_entry(void) pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); /* Call lib/bootblock.c main */ - main(); + bootblock_main_with_timestamp(((uint64_t)tsc_hi << 32) | tsc_lo); } static void cache_bios_region(void) diff --git a/src/soc/intel/apollolake/bootblock/cache_as_ram.S b/src/soc/intel/apollolake/bootblock/cache_as_ram.S index cd301ac5e9..f19cb71f55 100644 --- a/src/soc/intel/apollolake/bootblock/cache_as_ram.S +++ b/src/soc/intel/apollolake/bootblock/cache_as_ram.S @@ -129,6 +129,12 @@ car_init_done: before_carstage: post_code(0x2b) + /* Restore the timestamp from bootblock_crt0.S (mm2:mm1) */ + movd %mm1, %eax + push %eax + movd %mm2, %eax + push %eax + /* We can call into C functions now */ call bootblock_c_entry |