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authorLee Leahy <leroy.p.leahy@intel.com>2016-07-24 18:18:52 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2016-08-03 06:17:02 +0200
commit9671faa497f1b2be70e5638c53878c4b9cdd9a25 (patch)
tree13aa658d0f31afceab9a02e18887e4213a2f919e /src/soc/intel/apollolake/chip.c
parent52d0c682bf3bb39584a1edd6e7326a6f4c1267f7 (diff)
downloadcoreboot-9671faa497f1b2be70e5638c53878c4b9cdd9a25.tar.xz
drivers/intel/fsp2_0: FSP driver handles all FSP errors
Move all FSP error handling into the FSP 2.0 driver. This removes the need to implement error handling within the SOC code. TEST=Build and run on Galileo Gen2 Change-Id: I4d548b4c90d369d3857c24f50f93e7db7e9d3028 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15853 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/chip.c')
-rw-r--r--src/soc/intel/apollolake/chip.c10
1 files changed, 3 insertions, 7 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 10b71fbc8d..812f663bfe 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -200,8 +200,7 @@ static void soc_init(void *data)
* default policy that doesn't honor boards' requirements. */
itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);
- if (fsp_silicon_init() != FSP_SUCCESS)
- die("FSP silicon init failed. Giving up.");
+ fsp_silicon_init();
/* Restore GPIO IRQ polarities back to previous settings. */
itss_restore_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END);
@@ -411,12 +410,9 @@ static void fsp_notify_dummy(void *arg)
{
enum fsp_notify_phase ph = (enum fsp_notify_phase) arg;
- enum fsp_status ret;
- if ((ret = fsp_notify(ph)) != FSP_SUCCESS) {
- printk(BIOS_CRIT, "FspNotify failed, ret = %x!\n", ret);
- fsp_handle_reset(ret);
- }
+ fsp_notify(ph);
+
/* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */
if (ph == READY_TO_BOOT) {
fsp_notify_dummy((void *)END_OF_FIRMWARE);