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authorMaxim Polyakov <max.senia.poliak@gmail.com>2020-02-16 11:51:57 +0300
committerPatrick Georgi <pgeorgi@google.com>2020-03-06 07:58:00 +0000
commit6704049fc911eba9f4e6dc36a916eccffd04a15e (patch)
treeb0f244a10cd3ba6e03c46a2ebb9085bea753c020 /src/soc/intel/apollolake/chip.h
parent44fc40e09186cd24df873df6ca4d82af46efc0f4 (diff)
downloadcoreboot-6704049fc911eba9f4e6dc36a916eccffd04a15e.tar.xz
soc/apl: add options to override USB port config
Allows to override the PortUsb20Enable and PortUsb30Enable FSP options (which are set to 1 by default) to enable/disable USB ports if the usb_config_override flag is set to "1". Therefore, these changes will not affect other boards with an Apollo Lake processor. Change-Id: Ia94a2be1647f7743ef0c918ae3b34437a179261c Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38815 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/apollolake/chip.h')
-rw-r--r--src/soc/intel/apollolake/chip.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index e5045d01b1..40cd39b46b 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -136,6 +136,11 @@ struct soc_intel_apollolake_config {
/* USB2 eye diagram settings per port */
struct usb2_eye_per_port usb2eye[APOLLOLAKE_USB2_PORT_MAX];
+ /* Override USB port configuration */
+ uint8_t usb_config_override;
+ struct usb_port_config usb2_port[APOLLOLAKE_USB2_PORT_MAX];
+ struct usb_port_config usb3_port[APOLLOLAKE_USB3_PORT_MAX];
+
/* GPIO SD card detect pin */
unsigned int sdcard_cd_gpio;