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| author | Alexandru Gagniuc <alexandrux.gagniuc@intel.com> | 2016-05-02 14:31:04 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-05-06 18:54:49 +0200 |
| commit | c1526f045828a75fecb947c9909792d9b20f187b (patch) | |
| tree | 7b09c8874ea2fde8a6d01fc3d5b9f06d03b1d9b3 /src/soc/intel/apollolake/chip.h | |
| parent | d5b7c55c46ed342dd0817f17138e4655c06b0303 (diff) | |
| download | coreboot-c1526f045828a75fecb947c9909792d9b20f187b.tar.xz | |
Revert "soc/intel/apollolake: Enable LPC bus interface"
This reverts commit e976bd44692d2adb320a1256f1b6bfaa6469108a.
The LPC resource allocation will be completely reworked in subsequent
patches. The most straightforward approach is to start by reverting
the existing code.
Change-Id: I2475542b79817020d4c956f22ed5856f05046b16
Reviewed-on: https://review.coreboot.org/14583
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/chip.h')
| -rw-r--r-- | src/soc/intel/apollolake/chip.h | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index 32d93dee36..9d2bc46d61 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -32,15 +32,6 @@ struct soc_intel_apollolake_config { uint8_t pcie_rp3_clkreq_pin; uint8_t pcie_rp4_clkreq_pin; uint8_t pcie_rp5_clkreq_pin; - - /* Generic IO decode ranges */ - uint32_t gen1_dec; - uint32_t gen2_dec; - uint32_t gen3_dec; - uint32_t gen4_dec; - - /* LPC port ranges */ - uint16_t lpc_dec; }; #endif /* _SOC_APOLLOLAKE_CHIP_H_ */ |