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author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-02 08:44:47 +0200 |
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committer | Martin Roth <martinroth@google.com> | 2018-10-05 01:38:15 +0000 |
commit | 4e6b7907de07c9c7d4b01a6213a8e13e946398cb (patch) | |
tree | d6cb8f208a588506710e36a38d141d9228af7483 /src/soc/intel/apollolake/cpu.c | |
parent | 19c0ae540ea992b76eb65421381269def0a6328d (diff) | |
download | coreboot-4e6b7907de07c9c7d4b01a6213a8e13e946398cb.tar.xz |
src: Fix MSR_PKG_CST_CONFIG_CONTROL register name
Change-Id: I492224b6900b9658d54c8cf486ef5d64b299687f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28871
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Diffstat (limited to 'src/soc/intel/apollolake/cpu.c')
-rw-r--r-- | src/soc/intel/apollolake/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index caa3bbf90f..e74599694d 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -47,7 +47,7 @@ static const struct reg_script core_msr_script[] = { #if !IS_ENABLED(CONFIG_SOC_INTEL_GLK) /* Enable C-state and IO/MWAIT redirect */ - REG_MSR_WRITE(MSR_PMG_CST_CONFIG_CONTROL, + REG_MSR_WRITE(MSR_PKG_CST_CONFIG_CONTROL, (PKG_C_STATE_LIMIT_C2_MASK | CORE_C_STATE_LIMIT_C10_MASK | IO_MWAIT_REDIRECT_MASK | CST_CFG_LOCK_MASK)), /* Power Management I/O base address for I/O trapping to C-states */ |