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| author | Aaron Durbin <adurbin@chromium.org> | 2017-07-14 17:29:29 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-07-17 15:00:30 +0000 |
| commit | b5a5aa645068414b769e7304d46270f85d974616 (patch) | |
| tree | 33fb6b9bab8badede0664bf9ae9b20522995c637 /src/soc/intel/apollolake/gpio_apl.c | |
| parent | aa2504a10e1106368cf5ec2e54e0083ee62057fb (diff) | |
| download | coreboot-b5a5aa645068414b769e7304d46270f85d974616.tar.xz | |
soc/intel/common/gpio: clean up logical to chipset mapping
1. Explicitly add LOGICAL to the reset macro name to make it explicit
that the values are logical.
2. Reword some of the comments and combine them into single comment
instead of scattering the comments throughout.
3. Use c99 struct initializers for the reset mapping array.
4. For the chipset specific values use literals that match the hardware.
5. Use 'U' suffixes on the literals so we don't trip up compiler being
over zealous on undefined behavior.
6. Use unsigned and fixed-width types for the reset mapping structure
since the code is reliant on matching up with a register definition.
7. Fix formatting that can fit < 80 cols.
Change-Id: Iaa23a319832c05b8a023f6e45c4ee5ac06dd7066
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/20589
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/apollolake/gpio_apl.c')
| -rw-r--r-- | src/soc/intel/apollolake/gpio_apl.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/gpio_apl.c b/src/soc/intel/apollolake/gpio_apl.c index d7d3fe01f2..a774470fc5 100644 --- a/src/soc/intel/apollolake/gpio_apl.c +++ b/src/soc/intel/apollolake/gpio_apl.c @@ -22,9 +22,9 @@ #include <soc/pm.h> static const struct reset_mapping rst_map[] = { - { PAD_CFG0_RESET_PWROK, PAD_CFG0_RESET_PWROK }, - { PAD_CFG0_RESET_DEEP, PAD_CFG0_RESET_DEEP }, - { PAD_CFG0_RESET_PLTRST, PAD_CFG0_RESET_PLTRST }, + { .logical = PAD_CFG0_LOGICAL_RESET_PWROK, .chipset = 0U << 30 }, + { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30 }, + { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 }, }; static const struct pad_community apl_gpio_communities[] = { |