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| author | Alexandru Gagniuc <alexandrux.gagniuc@intel.com> | 2016-05-02 14:31:04 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-05-06 18:54:49 +0200 |
| commit | c1526f045828a75fecb947c9909792d9b20f187b (patch) | |
| tree | 7b09c8874ea2fde8a6d01fc3d5b9f06d03b1d9b3 /src/soc/intel/apollolake/include | |
| parent | d5b7c55c46ed342dd0817f17138e4655c06b0303 (diff) | |
| download | coreboot-c1526f045828a75fecb947c9909792d9b20f187b.tar.xz | |
Revert "soc/intel/apollolake: Enable LPC bus interface"
This reverts commit e976bd44692d2adb320a1256f1b6bfaa6469108a.
The LPC resource allocation will be completely reworked in subsequent
patches. The most straightforward approach is to start by reverting
the existing code.
Change-Id: I2475542b79817020d4c956f22ed5856f05046b16
Reviewed-on: https://review.coreboot.org/14583
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/include')
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/lpc.h | 40 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/include/soc/pci_devs.h | 3 |
2 files changed, 0 insertions, 43 deletions
diff --git a/src/soc/intel/apollolake/include/soc/lpc.h b/src/soc/intel/apollolake/include/soc/lpc.h deleted file mode 100644 index 2125f4ade1..0000000000 --- a/src/soc/intel/apollolake/include/soc/lpc.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2016 Intel Corp. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _SOC_APOLLOLAKE_LPC_H -#define _SOC_APOLLOLAKE_LPC_H - -/* PCI Configuration Space (D31:F0): LPC */ -#define SERIRQ_CNTL 0x64 /* Serial IRQ Control Register */ -#define LPC_IO_DEC 0x80 /* IO Decode Ranges Register */ -#define LPC_EN 0x82 /* LPC IF Enables Register */ -#define LPC_EN_COMA (1 << 0) /* COM port A */ -#define LPC_EN_COMB (1 << 1) /* COM port B */ -#define LPC_EN_PARP (1 << 2) /* Parallel port */ -#define LPC_EN_FLP (1 << 3) /* Floppy */ -#define LPC_EN_LGAME (1 << 8) /* Low Gameport, 0x200-0x207 */ -#define LPC_EN_HGAME (1 << 9) /* High Gameport, 0x208-0x20f */ -#define LPC_EN_KB (1 << 10) /* Keyboard, 0x60, 0x64 */ -#define LPC_EN_MC1 (1 << 11) /* Microcontroller #1, 0x62, 0x66 */ -#define LPC_EN_MC2 (1 << 13) /* Microcontroller #2, 0x4e, 0x4f */ -#define LPC_EN_SIO (1 << 12) /* Super IO, 0x2e, 0x2f */ - -#define LPC_GEN1_DEC 0x84 /* LPC IF Generic Decode Range 1 */ -#define LPC_GEN2_DEC 0x88 /* LPC IF Generic Decode Range 2 */ -#define LPC_GEN3_DEC 0x8C /* LPC IF Generic Decode Range 3 */ -#define LPC_GEN4_DEC 0x90 /* LPC IF Generic Decode Range 4 */ - -#endif //_SOC_APOLLOLAKE_LPC_H diff --git a/src/soc/intel/apollolake/include/soc/pci_devs.h b/src/soc/intel/apollolake/include/soc/pci_devs.h index ae80a04f86..7b8caafd69 100644 --- a/src/soc/intel/apollolake/include/soc/pci_devs.h +++ b/src/soc/intel/apollolake/include/soc/pci_devs.h @@ -48,11 +48,8 @@ #define LPSS_DEV_UART2 _LPSS_PCI_DEV(UART, 2) #define LPSS_DEV_UART3 _LPSS_PCI_DEV(UART, 3) -#define LPC_SLOT 0x1f - #define P2SB_DEV PCI_DEV(0, 0xd, 0) #define PMC_DEV PCI_DEV(0, 0xd, 1) #define SPI_DEV PCI_DEV(0, 0xd, 2) -#define LPC_DEV PCI_DEV(0, LPC_SLOT, 0) #endif |