soc/apollolake/lpc: Open I/O to LPC based on resource allocation

Besides a number of fixed memory windows, Apollolake supports
opening a configureable 64 KiB MMIO window, as well as four PMIO
windows to the LPC bus. Open up these windows dynamically, based on
how resources were allocated to the child LPC devices.

Change-Id: I170e861693cb6fd1be38889adc951f197a13460f
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Reviewed-on: https://review.coreboot.org/14584
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 71 insertions, 1 deletions

diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c
index 10677df503..5b552d8491 100644
--- a/src/soc/intel/apollolake/lpc.c
+++ b/src/soc/intel/apollolake/lpc.c
@@ -19,8 +19,27 @@
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <soc/acpi.h>
+#include <soc/lpc.h>
 #include <soc/pci_ids.h>
 
+/*
+ * SCOPE:
+ * The purpose of this driver is to eliminate manual resource allocation for
+ * devices under the LPC bridge.
+ *
+ * BACKGROUND:
+ * The resource allocator reserves IO and memory resources to devices on the
+ * LPC bus, but it is up to the hardware driver to make sure that those
+ * resources are decoded to the LPC bus. This is what this driver does.
+ *
+ * THEORY OF OPERATION:
+ * The .scan_bus member of the driver's ops will scan the static device tree
+ * (devicetree.cb) and invoke drivers of devices on the LPC bus. This creates
+ * a list of child devices, along with their resources. set_child_resources()
+ * parses that list and looks for resources needed by the child devices. It
+ * opens up IO and memory windows as needed.
+ */
+
 static void soc_lpc_add_io_resources(device_t dev)
 {
 	struct resource *res;
@@ -41,12 +60,63 @@ static void soc_lpc_read_resources(device_t dev)
 	soc_lpc_add_io_resources(dev);
 }
 
+static void set_child_resources(struct device *dev);
+
+static void loop_resources(struct device *dev)
+{
+	struct resource *res;
+
+	for (res = dev->resource_list; res; res = res->next) {
+
+		if (res->flags & IORESOURCE_IO) {
+			lpc_open_pmio_window(res->base, res->size);
+		}
+
+		if (res->flags & IORESOURCE_MEM) {
+			/* Check if this is already decoded. */
+			if (lpc_fits_fixed_mmio_window(res->base, res->size))
+				continue;
+
+			lpc_open_mmio_window(res->base, res->size);
+		}
+
+	}
+	set_child_resources(dev);
+}
+
+/*
+ * Loop through all the child devices' resources, and open up windows to the
+ * LPC bus, as appropriate.
+ */
+static void set_child_resources(struct device *dev)
+{
+	struct bus *link;
+	struct device *child;
+
+	for (link = dev->link_list; link; link = link->next) {
+		for (child = link->children; child; child = child->sibling) {
+			loop_resources(child);
+		}
+	}
+}
+
+static void set_resources(device_t dev)
+{
+	pci_dev_set_resources(dev);
+
+	/* Close all previously opened windows and allocate from scratch. */
+	lpc_close_pmio_windows();
+	/* Now open up windows to devices which have declared resources. */
+	set_child_resources(dev);
+}
+
 static struct device_operations device_ops = {
 	.read_resources = &soc_lpc_read_resources,
-	.set_resources = &pci_dev_set_resources,
+	.set_resources = set_resources,
 	.enable_resources = &pci_dev_enable_resources,
 	.write_acpi_tables = southbridge_write_acpi_tables,
 	.acpi_inject_dsdt_generator = southbridge_inject_dsdt,
+	.scan_bus = scan_lpc_bus,
 };
 
 static const struct pci_driver soc_lpc __pci_driver = {