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| author | Andrey Petrov <andrey.petrov@intel.com> | 2016-05-26 15:29:15 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-05-31 20:06:29 +0200 |
| commit | 204af8157dd4d4d2b295159628419812ec6a2816 (patch) | |
| tree | 14465c25cd6bfcfa1d91945f18109427cdf0d9f0 /src/soc/intel/apollolake/mmap_boot.c | |
| parent | b28a411362828b5d64220e15b0be8143709e083a (diff) | |
| download | coreboot-204af8157dd4d4d2b295159628419812ec6a2816.tar.xz | |
soc/intel/apollolake: Update SPI memory mapping constraints
MMIO region of 256 KiB under 4 GiB is not decoded by SPI controller
by hardware design. Current code incorrectly specifies size of that
region to be 128 KiB. This change corrects the value to 256 KiB.
Change-Id: Idcc67eb3565b800d835e75c0b765dd49d1656938
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14979
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/mmap_boot.c')
| -rw-r--r-- | src/soc/intel/apollolake/mmap_boot.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/mmap_boot.c b/src/soc/intel/apollolake/mmap_boot.c index bf61941da3..8009ab9568 100644 --- a/src/soc/intel/apollolake/mmap_boot.c +++ b/src/soc/intel/apollolake/mmap_boot.c @@ -23,8 +23,8 @@ #include <fmap.h> #include <soc/intel/common/nvm.h> -/* The 128 KiB right below 4G are decoded by readonly SRAM, not boot media */ -#define IFD_BIOS_MAX_MAPPED (CONFIG_IFD_BIOS_END - 128 * KiB) +/* The 256 KiB right below 4G are decoded by readonly SRAM, not boot media */ +#define IFD_BIOS_MAX_MAPPED (CONFIG_IFD_BIOS_END - 256 * KiB) #define IFD_MAPPED_SIZE (IFD_BIOS_MAX_MAPPED - CONFIG_IFD_BIOS_START) #define IFD_BIOS_SIZE (CONFIG_IFD_BIOS_END - CONFIG_IFD_BIOS_START) |