soc/intel/apollolake: refactor rtc failure checking

In order to prepare for checking RTC failure in the early boot
paths move the rtc failure calculation to pmutil.c and add a helper
function to determine if failure occurred.

BUG=b:63054105

Change-Id: I1b02028a1830ff9b28b23da7a4a1fd343f329f0d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/21551
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>

1 files changed, 19 insertions, 0 deletions

diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c
index e007da9512..abf47b7782 100644
--- a/src/soc/intel/apollolake/pmutil.c
+++ b/src/soc/intel/apollolake/pmutil.c
@@ -19,6 +19,7 @@
 
 #include <arch/acpi.h>
 #include <arch/io.h>
+#include <cbmem.h>
 #include <console/console.h>
 #include <cpu/x86/msr.h>
 #include <device/device.h>
@@ -26,6 +27,7 @@
 #include <device/pci_def.h>
 #include <intelblocks/msr.h>
 #include <intelblocks/pmclib.h>
+#include <intelblocks/rtc.h>
 #include <rules.h>
 #include <soc/iomap.h>
 #include <soc/cpu.h>
@@ -198,3 +200,20 @@ void enable_pm_timer_emulation(void)
 	msr.lo = EMULATE_PM_TMR_EN | (ACPI_BASE_ADDRESS + R_ACPI_PM1_TMR);
 	wrmsr(MSR_EMULATE_PM_TMR, msr);
 }
+
+static int rtc_failed(uint32_t gen_pmcon1)
+{
+	return !!(gen_pmcon1 & RPS);
+}
+
+int soc_get_rtc_failed(void)
+{
+	const struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE);
+
+	if (!ps) {
+		printk(BIOS_ERR, "Could not find power state in cbmem, RTC init aborted\n");
+		return 1;
+	}
+
+	return rtc_failed(ps->gen_pmcon1);
+}