diff options
author | Divya Chellap <divya.chellappa@intel.com> | 2017-11-29 18:53:03 +0530 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-12-02 05:26:05 +0000 |
commit | 0b15b70b18b0a76b053c9321c308c7364618ba93 (patch) | |
tree | e3bdae8967e52d7d74e178094a73a6595357ac97 /src/soc/intel/apollolake/pnpconfig.c | |
parent | 64d855dbb0d52b2e4486c48cb6161391b9abecb4 (diff) | |
download | coreboot-0b15b70b18b0a76b053c9321c308c7364618ba93.tar.xz |
soc/intel/apollolake: Add PNP config
1. Programs PNP values for AUNIT, BUNIT & TUNIT registers
as per reference code.
2. A new configuration option pnp_settings is introduced in
devicetree.cb to select PNP settings among performance,
power, power & performance.
TEST = built and booted glkrvp, verfied that the callback gets
control, verified warm and cold reboots.
Change-Id: Ibd70a42c9406941c8a93cc972f22c2475e9d0200
Signed-off-by: Divya Chellap <divya.chellappa@intel.com>
Reviewed-on: https://review.coreboot.org/22488
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/pnpconfig.c')
-rw-r--r-- | src/soc/intel/apollolake/pnpconfig.c | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/pnpconfig.c b/src/soc/intel/apollolake/pnpconfig.c new file mode 100644 index 0000000000..f9d493ed3e --- /dev/null +++ b/src/soc/intel/apollolake/pnpconfig.c @@ -0,0 +1,67 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. +*/ + +#include <bootstate.h> +#include <console/console.h> +#include <intelblocks/pcr.h> +#include <soc/pci_devs.h> +#include <soc/pnpconfig.h> +#include "chip.h" + +static const struct pnpconfig perf[] = { + VALUEFORPERF_MSG_VALUES_PLATFORM_DEFAULT, +}; + +static const struct pnpconfig power[] = { + VALUEFORPOWER_MSG_VALUES_PLATFORM_DEFAULT, +}; + +static const struct pnpconfig power_perf[] = { + VALUEFORPWRPERF_MSG_VALUES_PLATFORM_DEFAULT, +}; + +static void pnp_settings(void *unused) +{ + int index; + size_t arrsize; + const struct pnpconfig *pnpconfigarr; + struct device *dev = SA_DEV_ROOT; + struct soc_intel_apollolake_config *config = dev->chip_info; + switch (config->pnp_settings) { + case PNP_PERF: + pnpconfigarr = perf; + arrsize = ARRAY_SIZE(perf); + break; + case PNP_POWER: + pnpconfigarr = power; + arrsize = ARRAY_SIZE(power); + break; + case PNP_PERF_POWER: + pnpconfigarr = power_perf; + arrsize = ARRAY_SIZE(power_perf); + break; + default: + printk(BIOS_NOTICE, "Invalid PNP settings selected"); + return; + } + + for (index = 0; index < arrsize; index++) + pcr_rmw32(pnpconfigarr[index].msgport, + pnpconfigarr[index].msgregaddr, + pnpconfigarr[index].mask, + pnpconfigarr[index].value); +} + +BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_EXIT, pnp_settings, NULL); |