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authorFurquan Shaikh <furquan@google.com>2016-07-30 18:06:23 -0700
committerAaron Durbin <adurbin@chromium.org>2016-08-02 18:38:04 +0200
commit8d66bee7beddfefcd493b232ff832f6d3053f9a5 (patch)
tree5dcad7f4f2782b7ef4a46fde6b02f8c0f8a7105b /src/soc/intel/apollolake
parent5e61233fc107f938f11b9db00aed23f99c6ae9ba (diff)
downloadcoreboot-8d66bee7beddfefcd493b232ff832f6d3053f9a5.tar.xz
intel/apollolake: Enable upper CMOS bank in bootblock
Upper CMOS bank is used to store the boot count. It is important to enable it as soon as possible in bootblock. BUG=chrome-os-partner:55473 Change-Id: I7c4f49c337c2e24a93c1e71466e2f66db04be562 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15998 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/intel/apollolake')
-rw-r--r--src/soc/intel/apollolake/bootblock/bootblock.c10
-rw-r--r--src/soc/intel/apollolake/include/soc/iosf.h4
2 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index 31144ff219..3015d17079 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -22,6 +22,7 @@
#include <soc/iomap.h>
#include <soc/cpu.h>
#include <soc/gpio.h>
+#include <soc/iosf.h>
#include <soc/mmap_boot.h>
#include <soc/northbridge.h>
#include <soc/pci_devs.h>
@@ -56,6 +57,13 @@ static void enable_pm_timer(void)
wrmsr(MSR_EMULATE_PM_TMR, msr);
}
+static void enable_cmos_upper_bank(void)
+{
+ uint32_t reg = iosf_read(IOSF_RTC_PORT_ID, RTC_CONFIG);
+ reg |= RTC_CONFIG_UCMOS_ENABLE;
+ iosf_write(IOSF_RTC_PORT_ID, RTC_CONFIG, reg);
+}
+
void asmlinkage bootblock_c_entry(uint64_t base_timestamp)
{
device_t dev = NB_DEV_ROOT;
@@ -82,6 +90,8 @@ void asmlinkage bootblock_c_entry(uint64_t base_timestamp)
pci_write_config16(dev, PCI_COMMAND,
PCI_COMMAND_IO | PCI_COMMAND_MASTER);
+ enable_cmos_upper_bank();
+
/* Call lib/bootblock.c main */
bootblock_main_with_timestamp(base_timestamp);
}
diff --git a/src/soc/intel/apollolake/include/soc/iosf.h b/src/soc/intel/apollolake/include/soc/iosf.h
index eeb93306cd..ae3e8ec88a 100644
--- a/src/soc/intel/apollolake/include/soc/iosf.h
+++ b/src/soc/intel/apollolake/include/soc/iosf.h
@@ -20,6 +20,10 @@
#include <arch/io.h>
+#define IOSF_RTC_PORT_ID 0xD1
+#define RTC_CONFIG 0x3400
+#define RTC_CONFIG_UCMOS_ENABLE (1 << 2)
+
inline static void iosf_write(uint16_t port, uint16_t reg, uint32_t val)
{
uintptr_t base = CONFIG_IOSF_BASE_ADDRESS | (port << 16) | (reg & ~3);