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| author | Michael Niewöhner <foss@mniewoehner.de> | 2019-10-26 10:44:33 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-30 08:31:43 +0000 |
| commit | 9b8d28f013b9540ab89578e0ea317054d4ae106e (patch) | |
| tree | 87e619825954b5b2d916214f3ddf8f2bb0a3ae5d /src/soc/intel/apollolake | |
| parent | 1f30de08f67a534eac5d30b414f231c1166a817e (diff) | |
| download | coreboot-9b8d28f013b9540ab89578e0ea317054d4ae106e.tar.xz | |
soc/intel/apollolake: set FSP param to enable or skip GOP
Set the FSP parameter PeiGraphicsPeimInit according to RUN_FSP_GOP to
enable or skip GOP.
Change-Id: I3546371dd18120e3fbd1179a79b2bdc0a7436726
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36352
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/apollolake')
| -rw-r--r-- | src/soc/intel/apollolake/chip.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 8e516f8a84..1aab8a1b7a 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -751,6 +751,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) /* Set VTD feature according to devicetree */ silconfig->VtdEnable = cfg->enable_vtd; + dev = pcidev_path_on_root(SA_DEVFN_IGD); + if (CONFIG(RUN_FSP_GOP) && dev && dev->enabled) + silconfig->PeiGraphicsPeimInit = 1; + else + silconfig->PeiGraphicsPeimInit = 0; + mainboard_silicon_init_params(silconfig); } |