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authorDuncan Laurie <dlaurie@google.com>2019-06-10 14:00:56 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-06-21 09:17:16 +0000
commit1a86cda6dbacfbae285fa3d44b3f67bea95367e3 (patch)
tree796c741837012098d19cb049dd6debe091f385af /src/soc/intel/apollolake
parentd97591c34571b66157c540355457c4fea794a611 (diff)
downloadcoreboot-1a86cda6dbacfbae285fa3d44b3f67bea95367e3.tar.xz
soc/intel: Provide SPD manufacturer ID and module type to SMBIOS
The DIMM manufacturing ID was not being initialized and so the DIMMs were not described in SMBIOS tables properly. The module type can also be provided, but the SMBIOS code expects SPD module type values from DDR2 so the DDR3/4 values are adjusted before sending to SMBIOS. BUG=b:134897498 BRANCH=sarien TEST=dump and compare with dmidecode BEFORE: Type: DDR4 Manufacturer: Unknown (0) Form Factor: Unknown AFTER: Type: DDR4 Manufacturer: Hynix/Hyundai Form Factor: SODIMM Change-Id: Id673e08aa6e3dad196009c3c21a3dda2f40c9e42 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33379 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/apollolake')
-rw-r--r--src/soc/intel/apollolake/meminit_util_apl.c2
-rw-r--r--src/soc/intel/apollolake/meminit_util_glk.c4
2 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/meminit_util_apl.c b/src/soc/intel/apollolake/meminit_util_apl.c
index 16d14d945f..1dc5ceeb2c 100644
--- a/src/soc/intel/apollolake/meminit_util_apl.c
+++ b/src/soc/intel/apollolake/meminit_util_apl.c
@@ -93,6 +93,8 @@ void save_lpddr4_dimm_info_part_num(const char *dram_part_num)
NULL, /* SPD not available */
memory_info_hob->DataWidth,
0,
+ 0,
+ src_dimm->MfgId,
0);
index++;
}
diff --git a/src/soc/intel/apollolake/meminit_util_glk.c b/src/soc/intel/apollolake/meminit_util_glk.c
index 59e133076a..0fbab0b177 100644
--- a/src/soc/intel/apollolake/meminit_util_glk.c
+++ b/src/soc/intel/apollolake/meminit_util_glk.c
@@ -99,7 +99,9 @@ void save_lpddr4_dimm_info_part_num(const char *dram_part_num)
src_dimm->SpdSave + SPD_SAVE_OFFSET_SERIAL,
memory_info_hob->DataWidth,
0,
- 0);
+ 0,
+ src_dimm->MfgId,
+ src_dimm->SpdModuleType);
index++;
}
}