diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2017-10-11 14:44:29 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2017-10-12 22:13:39 +0000 |
| commit | c4e652ff572d7eea3bbbae21825d0085e294cb98 (patch) | |
| tree | 7a9a5ad7d0374742bb7ac091dc4f2814795e47ad /src/soc/intel/apollolake | |
| parent | bbd5ee4187dd5b85a8ccf6de28b24a70c0343174 (diff) | |
| download | coreboot-c4e652ff572d7eea3bbbae21825d0085e294cb98.tar.xz | |
soc/intel/common: Clean up PMC library GPE handling API
1. Update gpe handling function names to explicitly mention if they
are operating on:
a. STD GPE events
b. GPIO GPE events
c. Both
2. Update comment block in pmclib.h to use generic names for STD and
GPIO GPE registers instead of using any one platform specific names.
BUG=b:67712608
Change-Id: I03349fe85ac31d4215418b884afd8c4b531e68d3
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/21968
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake')
| -rw-r--r-- | src/soc/intel/apollolake/pmc.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/pmutil.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/smi.c | 4 |
3 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/apollolake/pmc.c b/src/soc/intel/apollolake/pmc.c index 190f5fb15c..a4b91e1b64 100644 --- a/src/soc/intel/apollolake/pmc.c +++ b/src/soc/intel/apollolake/pmc.c @@ -154,7 +154,7 @@ static void pmc_init(struct device *dev) pch_log_state(); /* Now that things have been logged clear out the PMC state. */ - pmc_clear_status(); + pmc_clear_prsts(); } static const struct device_operations device_ops = { diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c index 666ef83763..b9ed5b458d 100644 --- a/src/soc/intel/apollolake/pmutil.c +++ b/src/soc/intel/apollolake/pmutil.c @@ -108,7 +108,7 @@ const char *const *soc_tco_sts_array(size_t *a) return tco_sts_bits; } -const char *const *soc_gpe_sts_array(size_t *a) +const char *const *soc_std_gpe_sts_array(size_t *a) { static const char *const gpe_sts_bits[] = { [0] = "PCIE_SCI", @@ -151,7 +151,7 @@ void soc_clear_pm_registers(uintptr_t pmc_bar) write32((void *)(pmc_bar + GEN_PMCON1), gen_pmcon1 & ~RPS); } -void soc_get_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2) +void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2) { DEVTREE_CONST struct soc_intel_apollolake_config *config; diff --git a/src/soc/intel/apollolake/smi.c b/src/soc/intel/apollolake/smi.c index f506aef63d..eacc2cb074 100644 --- a/src/soc/intel/apollolake/smi.c +++ b/src/soc/intel/apollolake/smi.c @@ -42,7 +42,7 @@ void southbridge_smm_clear_state(void) pmc_clear_smi_status(); pmc_clear_pm1_status(); pmc_clear_tco_status(); - pmc_clear_gpe_status(); + pmc_clear_all_gpe_status(); } void southbridge_smm_enable_smi(void) @@ -50,7 +50,7 @@ void southbridge_smm_enable_smi(void) printk(BIOS_DEBUG, "Enabling SMIs.\n"); /* Configure events */ pmc_enable_pm1(PWRBTN_EN | GBL_EN); - pmc_disable_gpe(PME_B0_EN); + pmc_disable_std_gpe(PME_B0_EN); /* Enable SMI generation */ pmc_enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS | GPIO_EN); |