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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-05 15:10:18 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-08 04:53:18 +0000
commit14222d86785d89415c014dab294205fd186b7084 (patch)
tree8760046ac6e86fc86b3d570a2e7281dc6e42fafd /src/soc/intel/apollolake
parent9970b61ad3049d87650cd7b4eb5f47d667098186 (diff)
downloadcoreboot-14222d86785d89415c014dab294205fd186b7084.tar.xz
arch/x86: Change smm_subregion() prototype
Do this to avoid some amount of explicit typecasting that would be required otherwise. Change-Id: I5bc2c3c1dd579f7c6c3d3354c0691e4ba3c778e1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34706 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/apollolake')
-rw-r--r--src/soc/intel/apollolake/cpu.c8
-rw-r--r--src/soc/intel/apollolake/memmap.c15
-rw-r--r--src/soc/intel/apollolake/romstage.c6
3 files changed, 11 insertions, 18 deletions
diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index f402dfe175..9b9b722bb3 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -205,9 +205,9 @@ void get_microcode_info(const void **microcode, int *parallel)
static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
size_t *smm_save_state_size)
{
- void *smm_base;
+ uintptr_t smm_base;
size_t smm_size;
- void *handler_base;
+ uintptr_t handler_base;
size_t handler_size;
/* All range registers are aligned to 4KiB */
@@ -217,12 +217,12 @@ static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
smm_region(&smm_base, &smm_size);
smm_subregion(SMM_SUBREGION_HANDLER, &handler_base, &handler_size);
- relo_attrs.smbase = (uint32_t)smm_base;
+ relo_attrs.smbase = smm_base;
relo_attrs.smrr_base = relo_attrs.smbase | MTRR_TYPE_WRBACK;
relo_attrs.smrr_mask = ~(smm_size - 1) & rmask;
relo_attrs.smrr_mask |= MTRR_PHYS_MASK_VALID;
- *perm_smbase = (uintptr_t)handler_base;
+ *perm_smbase = handler_base;
*perm_smsize = handler_size;
*smm_save_state_size = sizeof(em64t100_smm_state_save_area_t);
}
diff --git a/src/soc/intel/apollolake/memmap.c b/src/soc/intel/apollolake/memmap.c
index 3daac3cdf1..7494481fa5 100644
--- a/src/soc/intel/apollolake/memmap.c
+++ b/src/soc/intel/apollolake/memmap.c
@@ -43,23 +43,19 @@ void *cbmem_top(void)
return tolum;
}
-void smm_region(void **start, size_t *size)
+void smm_region(uintptr_t *start, size_t *size)
{
- *start = (void *)sa_get_tseg_base();
+ *start = sa_get_tseg_base();
*size = sa_get_tseg_size();
}
-int smm_subregion(int sub, void **start, size_t *size)
+int smm_subregion(int sub, uintptr_t *start, size_t *size)
{
uintptr_t sub_base;
size_t sub_size;
- void *smm_base;
const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
- smm_region(&smm_base, &sub_size);
- sub_base = (uintptr_t)smm_base;
-
- assert(sub_size > CONFIG_SMM_RESERVED_SIZE);
+ smm_region(&sub_base, &sub_size);
switch (sub) {
case SMM_SUBREGION_HANDLER:
@@ -75,8 +71,7 @@ int smm_subregion(int sub, void **start, size_t *size)
return -1;
}
- *start = (void *)sub_base;
+ *start = sub_base;
*size = sub_size;
-
return 0;
}
diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c
index 62eb1db1fe..3ce63704fb 100644
--- a/src/soc/intel/apollolake/romstage.c
+++ b/src/soc/intel/apollolake/romstage.c
@@ -202,10 +202,9 @@ asmlinkage void car_stage_entry(void)
uintptr_t top_of_ram;
bool s3wake;
struct chipset_power_state *ps = pmc_get_power_state();
- void *smm_base;
+ uintptr_t smm_base;
size_t smm_size, var_size;
const void *new_var_data;
- uintptr_t tseg_base;
timestamp_add_now(TS_START_ROMSTAGE);
@@ -258,8 +257,7 @@ asmlinkage void car_stage_entry(void)
* region for other purposes.
*/
smm_region(&smm_base, &smm_size);
- tseg_base = (uintptr_t)smm_base;
- postcar_frame_add_mtrr(&pcf, tseg_base, smm_size, MTRR_TYPE_WRBACK);
+ postcar_frame_add_mtrr(&pcf, smm_base, smm_size, MTRR_TYPE_WRBACK);
run_postcar_phase(&pcf);
}