diff options
| author | Barnali Sarkar <barnali.sarkar@intel.com> | 2017-02-21 17:48:53 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-03-21 17:57:25 +0100 |
| commit | ad017c63d29fe24f8e3d3943e457f551962b6c3a (patch) | |
| tree | dbc4110b2c2abc763015f31d6b3dfc167bfb0e13 /src/soc/intel/apollolake | |
| parent | 1583dbd7b70cce8a334563b4cf9d17f7a1979856 (diff) | |
| download | coreboot-ad017c63d29fe24f8e3d3943e457f551962b6c3a.tar.xz | |
soc/intel/apollolake: Use common function to fill DIMM information
Extract SMBIOS memory information from FSP SMBIOS_MEM_INFO_HOB
and use common function dimm_info_fill() to save it in CBMEM.
BUG=chrome-os-partner:61729
BRANCH=none
TEST=Build and boot Reef to verify the type 17 DIMM info coming in
SMBIOS table from Kernel command "dmidecode".
Change-Id: I33c3a0bebf33c53beadd745bc3d991e1e51050b7
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/18451
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Diffstat (limited to 'src/soc/intel/apollolake')
| -rw-r--r-- | src/soc/intel/apollolake/meminit.c | 40 |
1 files changed, 10 insertions, 30 deletions
diff --git a/src/soc/intel/apollolake/meminit.c b/src/soc/intel/apollolake/meminit.c index 0f553ee97f..9546c19086 100644 --- a/src/soc/intel/apollolake/meminit.c +++ b/src/soc/intel/apollolake/meminit.c @@ -16,7 +16,7 @@ #include <console/console.h> #include <fsp/util.h> #include <memory_info.h> -#include <smbios.h> +#include <soc/intel/common/smbios.h> #include <soc/meminit.h> #include <stddef.h> /* required for FspmUpd.h */ #include <fsp/soc_binding.h> @@ -304,35 +304,15 @@ void save_lpddr4_dimm_info(const struct lpddr4_cfg *lp4cfg, size_t mem_sku) continue; /* Populate the DIMM information */ - dest_dimm->dimm_size = src_dimm->SizeInMb; - dest_dimm->ddr_type = memory_info_hob->MemoryType; - dest_dimm->ddr_frequency = - memory_info_hob->MemoryFrequencyInMHz; - dest_dimm->channel_num = channel_info->ChannelId; - dest_dimm->dimm_num = src_dimm->DimmId; - strncpy((char *)dest_dimm->module_part_number, - lp4cfg->skus[mem_sku].part_num, - sizeof(dest_dimm->module_part_number)); - - switch (memory_info_hob->DataWidth) { - case 8: - dest_dimm->bus_width = MEMORY_BUS_WIDTH_8; - break; - case 16: - dest_dimm->bus_width = MEMORY_BUS_WIDTH_16; - break; - case 32: - dest_dimm->bus_width = MEMORY_BUS_WIDTH_32; - break; - case 64: - dest_dimm->bus_width = MEMORY_BUS_WIDTH_64; - break; - case 128: - dest_dimm->bus_width = MEMORY_BUS_WIDTH_128; - break; - default: - printk(BIOS_ERR, "Incorrect DIMM Data Width"); - } + dimm_info_fill(dest_dimm, + src_dimm->SizeInMb, + memory_info_hob->MemoryType, + memory_info_hob->MemoryFrequencyInMHz, + channel_info->ChannelId, + src_dimm->DimmId, + lp4cfg->skus[mem_sku].part_num, + strlen(lp4cfg->skus[mem_sku].part_num), + memory_info_hob->DataWidth); index++; } } |