diff options
| author | Furquan Shaikh <furquan@chromium.org> | 2016-11-21 09:19:53 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2016-11-22 17:39:07 +0100 |
| commit | d0c00052d32ed2ea461811632197845120ca8a08 (patch) | |
| tree | 03c311038a65edb62bfe6a763a4667a5af408239 /src/soc/intel/apollolake | |
| parent | d2fb6ae813880b8fd1b3983e0e61c7e51fb9b20b (diff) | |
| download | coreboot-d0c00052d32ed2ea461811632197845120ca8a08.tar.xz | |
soc/intel: Use correct terminology for SPI flash operations
FPR is an attribute of the SPI flash component and not of the SPI bus
itself. Rename functions, file names and Kconfig option to make sure
this is conveyed correctly.
BUG=None
BRANCH=None
TEST=Compiles successfully.
Change-Id: I9f06f1a8ee28b8c56db64ddd6a19dd9179c54f50
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17560
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake')
| -rw-r--r-- | src/soc/intel/apollolake/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/intel/apollolake/spi.c | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index cba2eab060..d1d660bc78 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -52,7 +52,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_LPSS_I2C select SOC_INTEL_COMMON_SMI - select SOC_INTEL_COMMON_SPI_PROTECT + select SOC_INTEL_COMMON_SPI_FLASH_PROTECT select UDELAY_TSC select TSC_CONSTANT_RATE select TSC_MONOTONIC_TIMER diff --git a/src/soc/intel/apollolake/spi.c b/src/soc/intel/apollolake/spi.c index 4da292ac85..eab3a12eac 100644 --- a/src/soc/intel/apollolake/spi.c +++ b/src/soc/intel/apollolake/spi.c @@ -22,7 +22,7 @@ #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <soc/intel/common/spi.h> +#include <soc/intel/common/spi_flash.h> #include <soc/pci_devs.h> #include <soc/spi.h> #include <spi_flash.h> @@ -420,7 +420,7 @@ int spi_read_status(uint8_t *status) return 0; } -int spi_get_fpr_info(struct fpr_info *info) +int spi_flash_get_fpr_info(struct fpr_info *info) { BOILERPLATE_CREATE_CTX(ctx); |