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authorJulius Werner <jwerner@chromium.org>2019-03-28 18:01:26 -0700
committerPatrick Georgi <pgeorgi@google.com>2019-04-01 07:56:48 +0000
commit9993b6f0b52257b05ccf5d6dab658c3bfe17e372 (patch)
tree02c5e759b2318a083398e00c97865f11f0aa431a /src/soc/intel/baytrail/Kconfig
parentcd429a8b0c8f46be00e2b147465eec513a2559e9 (diff)
downloadcoreboot-9993b6f0b52257b05ccf5d6dab658c3bfe17e372.tar.xz
vboot: Select CONFIG_VBOOT_OPROM_MATTERS in more cases
This patch enables CONFIG_VBOOT_OPROM_MATTERS in a few more cases where I think(?) it should be. Haswell, Broadwell and Baytrail Chromebooks have this enabled in their old depthcharge firmware branches -- we presumably just forgot to move it over when vboot2 migrated the option to coreboot. Braswell didn't, but it seems like this requirement was added when it was migrated to FSP 1.1...? (Not very sure about that one, but it does call load_vbt() right now which executes things based on display_init_required().) Additionally, it seems to make sense to enable it whenever the user explicitly selects VGA_ROM_RUN in menuconfig (like one of the Intel defconfigs does). Once we have all this, one could take a step back and ask whether this option still makes sense at all anymore. It's enabled for almost all devices (that work with vboot at all), it will presumably be enabled for all future devices, and it seems that most devices that don't enable it use libgfxinit, which as far as I can tell isn't gated on display_init_required() but probably should be. Realistically, whatever kind of display init a board needs to do (native or option ROM), it's probably expensive enough that it's worth skipping on a normal mode vboot boot, and we'd want to have this enabled by default on everything except boards that actually don't have a display. So maybe we should flip it around to CONFIG_VBOOT_OPROM_DOESNT_MATTER, but doing that would probably lead to nobody ever selecting it at all. Not sure what the best solution there is yet, but I think this patch at least moves things in the more correct direction. Change-Id: Id96a88296ddb9cfbb58ea67d93e1638d95570e2c Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32114 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/Kconfig')
-rw-r--r--src/soc/intel/baytrail/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index e824ee49a6..a83a7e9ee6 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -43,6 +43,7 @@ config CPU_SPECIFIC_OPTIONS
select CPU_HAS_L2_ENABLE_MSR
config VBOOT
+ select VBOOT_OPROM_MATTERS
select VBOOT_STARTS_IN_ROMSTAGE
config BOOTBLOCK_CPU_INIT