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| author | Aaron Durbin <adurbin@chromium.org> | 2013-11-07 11:19:34 -0600 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-06 17:18:54 +0200 |
| commit | 84da959c691a1efa87ff47edd03d5427eaf6e093 (patch) | |
| tree | 0f0b307667c992a4f2596cdb08f77e927f93c28e /src/soc/intel/baytrail/acpi/lpc.asl | |
| parent | fa91e02a15ff45f70886b969a9587468afec10ac (diff) | |
| download | coreboot-84da959c691a1efa87ff47edd03d5427eaf6e093.tar.xz | |
rambi: update EC support
Fix the SMI and SCI gpios for Rambi. Also, add in the
EC callbacks for the SMI handler. Note that the handler
for GPI SMIs has not been tested yet as baytrail chipset
code doesn't yet support setting up those configurations
yet.
BUG=chrome-os-partner:23505
BRANCH=None
TEST=Noted that SCI was enabled in /sys/firmware/acpi/interrupts
for the EC's SCI GPI. Also was able to see Chrome EC messages
with CONFIG_DEBUG_SMI and powering down at the dev screen.
Change-Id: I67b278fd38e1c09271d2c1e16e42f6e8c49e3a70
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176077
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4948
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel/baytrail/acpi/lpc.asl')
0 files changed, 0 insertions, 0 deletions