diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-11-01 13:34:00 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2014-03-11 19:55:30 +0100 |
| commit | 3c9f17462a618d4fc848fac852a0f2bfca50c8d3 (patch) | |
| tree | e5aa4dccd70e0e84b195030ca87f37f621fdf9f3 /src/soc/intel/baytrail/chip.h | |
| parent | f81a91a768f54ef25aa6019fb40d3b98a3cb18c2 (diff) | |
| download | coreboot-3c9f17462a618d4fc848fac852a0f2bfca50c8d3.tar.xz | |
baytrail: Add EHCI initialization
This adds required steps to initialize the EHCI controller
on the baytrail platform.
BUG=chrome-os-partner:23635
BRANCH=rambi
TEST=build and boot from USB on rambi
Change-Id: I3a5487791e2305616036d4550e260a178c0e1c4d
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175512
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4930
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/soc/intel/baytrail/chip.h')
| -rw-r--r-- | src/soc/intel/baytrail/chip.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/chip.h b/src/soc/intel/baytrail/chip.h index 38dd8068bd..72ef10d67b 100644 --- a/src/soc/intel/baytrail/chip.h +++ b/src/soc/intel/baytrail/chip.h @@ -36,6 +36,16 @@ struct soc_intel_baytrail_config { /* USB routing */ int usb_route_to_xhci; + + /* USB PHY settings specific to the board */ + uint32_t usb2_per_port_lane0; + uint32_t usb2_per_port_rcomp_hs_pullup0; + uint32_t usb2_per_port_lane1; + uint32_t usb2_per_port_rcomp_hs_pullup1; + uint32_t usb2_per_port_lane2; + uint32_t usb2_per_port_rcomp_hs_pullup2; + uint32_t usb2_per_port_lane3; + uint32_t usb2_per_port_rcomp_hs_pullup3; }; extern struct chip_operations soc_intel_baytrail_ops; |