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authorKane Chen <kane.chen@intel.com>2015-01-17 08:19:54 +0800
committerStefan Reinauer <stefan.reinauer@coreboot.org>2015-04-10 20:18:19 +0200
commitba9b7bfc6f4b6622fa2d272faeb32b7135287ee6 (patch)
tree758efaa9b3d05a73c79481529872993e5904449e /src/soc/intel/baytrail/gfx.c
parentff0f460e764e24d4f7bae7e9dce8967f9cd3e36c (diff)
downloadcoreboot-ba9b7bfc6f4b6622fa2d272faeb32b7135287ee6.tar.xz
baytrail: add code for supporting 2x ddr refresh rate
this code change provides a way to enable 2x refresh rate in RW image In baytrail, it enables 2x refresh rate by default BUG=chrome-os-partner:35210 BRANCH=none TEST=check the register is set properly on rambi Change-Id: I2a935b570c564986898b6c2064fc7ad43506dcba Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: c740d403708862514be9fa24f56b2764328979eb Original-Change-Id: I84f33d75ea7ebfea180b304e8ff683884f0dbe8a Original-Signed-off-by: Kane Chen <kane.chen@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/241754 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9498 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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