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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-02-24 13:43:39 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-04 15:43:30 +0000 |
| commit | 79ccc6933284ca02d17d9e1eda9a531ce43e1f65 (patch) | |
| tree | 49fe1b78916338575b1a6bec931e2fb885cc311a /src/soc/intel/baytrail/include | |
| parent | f3161df2eba8d61445372a9c732c61a1947064bd (diff) | |
| download | coreboot-79ccc6933284ca02d17d9e1eda9a531ce43e1f65.tar.xz | |
src: capitalize 'PCIe'
Change-Id: I55bbb535372dc9af556b95ba162f02ffead2b9e2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39101
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/include')
| -rw-r--r-- | src/soc/intel/baytrail/include/soc/nvs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/include/soc/nvs.h b/src/soc/intel/baytrail/include/soc/nvs.h index 4a89eb967e..8532728503 100644 --- a/src/soc/intel/baytrail/include/soc/nvs.h +++ b/src/soc/intel/baytrail/include/soc/nvs.h @@ -83,7 +83,7 @@ typedef struct global_nvs_t { u8 pavp; /* 0xe9 - IGD PAVP data */ u8 rsvd12; /* 0xea - rsvd */ u8 oscc; /* 0xeb - PCIe OSC control */ - u8 npce; /* 0xec - native pcie support */ + u8 npce; /* 0xec - native PCIe support */ u8 plfl; /* 0xed - platform flavor */ u8 brev; /* 0xee - board revision */ u8 dpbm; /* 0xef - digital port b mode */ |