summaryrefslogtreecommitdiff
path: root/src/soc/intel/baytrail/iosf.c
diff options
context:
space:
mode:
authorAaron Durbin <adurbin@chromium.org>2013-09-23 14:17:35 -0500
committerAaron Durbin <adurbin@google.com>2014-01-31 20:42:28 +0100
commit4c53df47302968fd6f90261d84c9d3c0f8e7bbc2 (patch)
tree50500c5e0f653c6358e8334568684bfb7dded1ee /src/soc/intel/baytrail/iosf.c
parent191570ded853521ed2e54414ba33074ba7909a7d (diff)
downloadcoreboot-4c53df47302968fd6f90261d84c9d3c0f8e7bbc2.tar.xz
baytrail: add dunit access and registers
The dunit on baytrail is the dram unit. Provide a means to access the configuration registers there using the proper IOSF mechanisms. BUG=chrome-os-partner:22875 BRANCH=none TEST=Built and booted. Able to read dram registers. Change-Id: I4d5c019720a7883fe93f3e1860bcd57ce2ea6542 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/170490 Reviewed-on: http://review.coreboot.org/4853 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail/iosf.c')
-rw-r--r--src/soc/intel/baytrail/iosf.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/iosf.c b/src/soc/intel/baytrail/iosf.c
index 6d4cba9bb6..2373d81598 100644
--- a/src/soc/intel/baytrail/iosf.c
+++ b/src/soc/intel/baytrail/iosf.c
@@ -59,3 +59,24 @@ void iosf_bunit_write(int reg, uint32_t val)
write_iosf_reg(MCR_REG, cr);
write_iosf_reg(MDR_REG, val);
}
+
+uint32_t iosf_dunit_read(int reg)
+{
+ uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_SYSMEMC) |
+ IOSF_PORT(IOSF_PORT_SYSMEMC) | IOSF_REG(reg) |
+ IOSF_BYTE_EN;
+
+ write_iosf_reg(MCR_REG, cr);
+ return read_iosf_reg(MDR_REG);
+}
+
+void iosf_dunit_write(int reg, uint32_t val)
+{
+ uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_SYSMEMC) |
+ IOSF_PORT(IOSF_PORT_SYSMEMC) | IOSF_REG(reg) |
+ IOSF_BYTE_EN;
+
+
+ write_iosf_reg(MCR_REG, cr);
+ write_iosf_reg(MDR_REG, val);
+}