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| author | Aaron Durbin <adurbin@chromium.org> | 2013-11-12 16:37:05 -0600 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-07 12:04:03 +0200 |
| commit | d7f0f3de10bb2aa4e41c8d87b364feaab7c1f704 (patch) | |
| tree | cd898d0e20d87f75a84d261d45837c286d545235 /src/soc/intel/baytrail/iosf.c | |
| parent | 9547f8d799829ddab9196c4e0cad644a06db49e9 (diff) | |
| download | coreboot-d7f0f3de10bb2aa4e41c8d87b364feaab7c1f704.tar.xz | |
baytrail: add score and ssc iosf access functions
The SCORE allows controlling the pad configuration while
the SSC handles the configuration for the storage control
cluster.
BUG=chrome-os-partner:23966
BRANCH=None
TEST=Built.
Change-Id: Ifd9f67a4e88d5bb99faec6ceeb3e263001a87c41
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176533
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4964
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/soc/intel/baytrail/iosf.c')
| -rw-r--r-- | src/soc/intel/baytrail/iosf.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/iosf.c b/src/soc/intel/baytrail/iosf.c index 7e0dacb812..4840deaede 100644 --- a/src/soc/intel/baytrail/iosf.c +++ b/src/soc/intel/baytrail/iosf.c @@ -168,3 +168,31 @@ void iosf_ccu_write(int reg, uint32_t val) IOSF_PORT(IOSF_PORT_CCU); return iosf_write_port(cr, reg, val); } + +uint32_t iosf_score_read(int reg) +{ + uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_SCORE) | + IOSF_PORT(IOSF_PORT_SCORE); + return iosf_read_port(cr, reg); +} + +void iosf_score_write(int reg, uint32_t val) +{ + uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_SCORE) | + IOSF_PORT(IOSF_PORT_SCORE); + return iosf_write_port(cr, reg, val); +} + +uint32_t iosf_scc_read(int reg) +{ + uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_SCC) | + IOSF_PORT(IOSF_PORT_SCC); + return iosf_read_port(cr, reg); +} + +void iosf_scc_write(int reg, uint32_t val) +{ + uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_SCC) | + IOSF_PORT(IOSF_PORT_SCC); + return iosf_write_port(cr, reg, val); +} |