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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-02-24 13:43:39 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-04 15:43:30 +0000 |
| commit | 79ccc6933284ca02d17d9e1eda9a531ce43e1f65 (patch) | |
| tree | 49fe1b78916338575b1a6bec931e2fb885cc311a /src/soc/intel/baytrail/pcie.c | |
| parent | f3161df2eba8d61445372a9c732c61a1947064bd (diff) | |
| download | coreboot-79ccc6933284ca02d17d9e1eda9a531ce43e1f65.tar.xz | |
src: capitalize 'PCIe'
Change-Id: I55bbb535372dc9af556b95ba162f02ffead2b9e2
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39101
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/pcie.c')
| -rw-r--r-- | src/soc/intel/baytrail/pcie.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/pcie.c b/src/soc/intel/baytrail/pcie.c index 6dc0346b23..6b6c28d731 100644 --- a/src/soc/intel/baytrail/pcie.c +++ b/src/soc/intel/baytrail/pcie.c @@ -163,7 +163,7 @@ static u8 all_ports_no_dev_present(struct device *dev) dev->path.pci.devfn &= ~0x7; dev->path.pci.devfn |= func; - /* is pcie device there */ + /* is PCIe device there */ if (pci_read_config32(dev, 0) == 0xFFFFFFFF) continue; |