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authorTim Wawrzynczak <twawrzynczak@chromium.org>2020-05-13 16:15:08 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-05-20 09:47:35 +0000
commitdbcf7b16219df0c04401b8fcd6a780174a7df305 (patch)
tree0ab8141306f5c7a7135337fc899f704ac825e5d0 /src/soc/intel/baytrail/refcode.c
parent17118a833a2df130ed24c2547ca903cac9fac0e0 (diff)
downloadcoreboot-dbcf7b16219df0c04401b8fcd6a780174a7df305.tar.xz
device/pci_device: Add notion of "hidden" PCI devices
On some SoCs, there are PCI devices that may get hidden from PCI enumeration by platform firmware. Because the Vendor ID reads back as 0xffffffff, it appears that there is no PCI device located at that BDF. However, because the device does exist, designers may wish to hang its PCI resources off of a real __pci_driver, as well as have it participate in ACPI table generation. This patch extends the semantics of the 'hidden' keyword in devicetree.cb. If a device now uses 'hidden' instead of 'on', then it will be assumed during PCI enumeration that the device indeed does exist, and it will not be removed as a "leftover device." This allows child devices to be enumerated correctly and also PCI resources can be designated from the {read,set}_resources callbacks. It should be noted that as of this commit, there are precisely 0 devices using 'hidden' in their devicetree.cb files, so this should be a safe thing to do. Later patches will begin moving PCI resources from random places (typically hung off of fixed SA and LPC) into the PMC device (procedure will vary per- platform). Change-Id: I16c2d3e1d1433343e63dfc16856cff69cd815e2a Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41384 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/refcode.c')
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