diff options
author | Aaron Durbin <adurbin@chromium.org> | 2013-09-24 12:36:14 -0500 |
---|---|---|
committer | Aaron Durbin <adurbin@google.com> | 2014-01-31 20:41:57 +0100 |
commit | ecf90863898469c9fa8251eedb62ec8e064f25c9 (patch) | |
tree | 4280bf1272fb956e5f8dba546c2d4b43cbf28c08 /src/soc/intel/baytrail/romstage/Makefile.inc | |
parent | ba170b477514239daf92dc7f4333318c96f275bc (diff) | |
download | coreboot-ecf90863898469c9fa8251eedb62ec8e064f25c9.tar.xz |
baytrail: initialize graphics before MRC
The graphics device needs to have its resource contraints
initialized before running the reference code. Right now just
use a 256MiB aperture, 32MiB of stolen memory data, and 2MiB
GTT memory.
BUG=chrome-os-partner:22869
BRANCH=None
TEST=Built and booted. Noted amount of stolen memory matches
configuration as well as BAR size within the graphics
device.
Change-Id: I328bf858f288363187cf705d6340947393b5ff10
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/170427
Reviewed-on: http://review.coreboot.org/4850
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail/romstage/Makefile.inc')
-rw-r--r-- | src/soc/intel/baytrail/romstage/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/romstage/Makefile.inc b/src/soc/intel/baytrail/romstage/Makefile.inc index 188ce44ecd..118c3485cd 100644 --- a/src/soc/intel/baytrail/romstage/Makefile.inc +++ b/src/soc/intel/baytrail/romstage/Makefile.inc @@ -2,3 +2,4 @@ cpu_incs += $(src)/soc/intel/baytrail/romstage/cache_as_ram.inc romstage-y += romstage.c romstage-y += raminit.c romstage-$(CONFIG_ENABLE_BUILTIN_COM1) += uart.c +romstage-y += gfx.c |