diff options
author | Aaron Durbin <adurbin@chromium.org> | 2016-07-13 23:20:07 -0500 |
---|---|---|
committer | Aaron Durbin <adurbin@chromium.org> | 2016-07-15 08:31:56 +0200 |
commit | f5cfaa39342bed7dbf3abe19486089c4cf8a4561 (patch) | |
tree | 9eda5fa75385b45dd5f618a024b22ef48da4e63f /src/soc/intel/baytrail/romstage/raminit.c | |
parent | 56db47fe204482093b23034030f7a7060c5c977b (diff) | |
download | coreboot-f5cfaa39342bed7dbf3abe19486089c4cf8a4561.tar.xz |
soc/intel/baytrail: use common Intel ACPI hardware definitions
Transition to using the common Intel ACPI hardware definitions
generic ACPI definitions.
BUG=chrome-os-partner:54977
Change-Id: Idf055fa86b56001a805e139de6723dfb77dcb224
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15669
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/romstage/raminit.c')
-rw-r--r-- | src/soc/intel/baytrail/romstage/raminit.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index 0784f69cf8..d45b9eab26 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -14,6 +14,7 @@ */ #include <stddef.h> +#include <arch/acpi.h> #include <arch/io.h> #include <bootmode.h> #include <cbfs.h> @@ -127,7 +128,7 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) } else if (!mrc_cache_get_current(&cache)) { mp->saved_data_size = cache->size; mp->saved_data = &cache->data[0]; - } else if (prev_sleep_state == 3) { + } else if (prev_sleep_state == ACPI_S3) { /* If waking from S3 and no cache then. */ printk(BIOS_DEBUG, "No MRC cache found in S3 resume path.\n"); post_code(POST_RESUME_FAILURE); @@ -135,7 +136,7 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) } else { printk(BIOS_DEBUG, "No MRC cache found.\n"); #if CONFIG_EC_GOOGLE_CHROMEEC - if (prev_sleep_state == 0) { + if (prev_sleep_state == ACPI_S0) { /* Ensure EC is running RO firmware. */ google_chromeec_check_ec_image(EC_IMAGE_RO); } @@ -162,7 +163,7 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) print_dram_info(); - if (prev_sleep_state != 3) { + if (prev_sleep_state != ACPI_S3) { cbmem_initialize_empty(); } else if (cbmem_initialize()) { #if CONFIG_HAVE_ACPI_RESUME |