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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-01-08 20:03:18 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-03-10 23:42:10 +0100 |
commit | 9e94dbfcd089db31b2201381f9d83a89cdea86b9 (patch) | |
tree | f73b282c8e37e29966f6a86419ceead0f6e5f39a /src/soc/intel/baytrail/xhci.c | |
parent | a63719407fc5fad17eebe0e5086511a511466353 (diff) | |
download | coreboot-9e94dbfcd089db31b2201381f9d83a89cdea86b9.tar.xz |
ACPI: Get S3 resume state from romstage_handoff
There is nothing platform specific in retrieving S3 resume state from
romstage_handoff structure. Boards without EARLY_CBMEM_INIT update
acpi_slp_type from ACPI power-management block or scratchpad registers.
Change-Id: Ifc3755f891a0810473b3216c1fec8e45908fc1ab
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8188
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Diffstat (limited to 'src/soc/intel/baytrail/xhci.c')
-rw-r--r-- | src/soc/intel/baytrail/xhci.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/baytrail/xhci.c b/src/soc/intel/baytrail/xhci.c index 8d076c2fa2..19339e4b62 100644 --- a/src/soc/intel/baytrail/xhci.c +++ b/src/soc/intel/baytrail/xhci.c @@ -184,7 +184,7 @@ static void xhci_route_all(device_t dev) /* Route ports to XHCI controller */ reg_script_run_on_dev(dev, xhci_route_all_script); - if (acpi_slp_type == 3) + if (acpi_is_wakeup_s3()) return; /* Reset enabled USB3 ports */ @@ -222,7 +222,7 @@ static void xhci_init(device_t dev) }; /* Initialize XHCI controller for boot or resume path */ - if (acpi_slp_type == 3) + if (acpi_is_wakeup_s3()) reg_script_run_on_dev(dev, xhci_init_resume_script); else reg_script_run_on_dev(dev, xhci_init_boot_script); |