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authorElyes HAOUAS <ehaouas@noos.fr>2018-05-22 10:42:28 +0200
committerNico Huber <nico.h@gmx.de>2018-05-24 18:38:25 +0000
commit17a3ceb2feb74ffbe4c039aecb4ec3ea2aca910c (patch)
tree99473a053ee233ec8a3b55ae960a0e3d050b51ed /src/soc/intel/baytrail/xhci.c
parent148b1db9c968b4e1de768ecf3dffa3996aecccbe (diff)
downloadcoreboot-17a3ceb2feb74ffbe4c039aecb4ec3ea2aca910c.tar.xz
soc/intel/baytrail: Get rid of device_t
Use of device_t has been abandoned in ramstage. Change-Id: I8b2cfe3e2090fb8eed755e40d337c6049d8dd96e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/baytrail/xhci.c')
-rw-r--r--src/soc/intel/baytrail/xhci.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/baytrail/xhci.c b/src/soc/intel/baytrail/xhci.c
index 350c6296a0..6ad63ba9a3 100644
--- a/src/soc/intel/baytrail/xhci.c
+++ b/src/soc/intel/baytrail/xhci.c
@@ -146,7 +146,7 @@ const struct reg_script xhci_clock_gating_script[] = {
};
/* Warm Reset a USB3 port */
-static void xhci_reset_port_usb3(device_t dev, int port)
+static void xhci_reset_port_usb3(struct device *dev, int port)
{
struct reg_script reset_port_usb3_script[] = {
/* Issue Warm Port Rest to the port */
@@ -165,7 +165,7 @@ static void xhci_reset_port_usb3(device_t dev, int port)
}
/* Prepare ports to be routed to EHCI or XHCI */
-static void xhci_route_all(device_t dev)
+static void xhci_route_all(struct device *dev)
{
static const struct reg_script xhci_route_all_script[] = {
/* USB3 SuperSpeed Enable */
@@ -194,7 +194,7 @@ static void xhci_route_all(device_t dev)
}
}
-static void xhci_init(device_t dev)
+static void xhci_init(struct device *dev)
{
struct soc_intel_baytrail_config *config = dev->chip_info;
struct reg_script xhci_hc_init[] = {