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author | Kane Chen <kane.chen@intel.com> | 2014-09-09 15:53:09 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-02 17:27:26 +0200 |
commit | 642e598102a48a5ffd76aae0d21795881a56c6d8 (patch) | |
tree | 4846438cac7ccc3673d4310983d775867fc65778 /src/soc/intel/baytrail | |
parent | 86b0c8b48038f537407c1b8ed9015a54d0159403 (diff) | |
download | coreboot-642e598102a48a5ffd76aae0d21795881a56c6d8.tar.xz |
broadwell: Update PCIe configuration to follow BWG
According to BIOS spec 8.14
B0:D28:F0[5:4] should be set to 11
BRANCH=none
BUG=chrome-os-partner:28234
TEST=build ok, boot to Auron and Samus
make sure register is set and PCIE is working
Change-Id: I4a7e990993c230dfc1ba83ea75f56757c2c18e46
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 82826e3c44c26252697677ec08b95a8f174bc360
Original-Change-Id: I7c37245053ceae460dac0f18363f585244db72f8
Original-Signed-off-by: Kane Chen <kane.chen@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/217414
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/9197
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/baytrail')
0 files changed, 0 insertions, 0 deletions