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authorPatrick Georgi <pgeorgi@google.com>2014-11-28 22:35:36 +0100
committerPatrick Georgi <pgeorgi@google.com>2014-11-30 12:20:07 +0100
commitbd79c5eaf1f13f33c43c99657f24fa4c0330619a (patch)
treec20d6e5e00fcf3494d1c3fdd2d84b97ae34a21ea /src/soc/intel/baytrail
parent1b2f2a071488bd15ce80194e85d318cd44659e54 (diff)
downloadcoreboot-bd79c5eaf1f13f33c43c99657f24fa4c0330619a.tar.xz
Replace hlt() loops with halt()
Change-Id: I8486e70615f4c404a342cb86963b5357a934c41d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7606 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/soc/intel/baytrail')
-rw-r--r--src/soc/intel/baytrail/romstage/raminit.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c
index 72d8e51b78..a51853a732 100644
--- a/src/soc/intel/baytrail/romstage/raminit.c
+++ b/src/soc/intel/baytrail/romstage/raminit.c
@@ -18,13 +18,13 @@
*/
#include <stddef.h>
-#include <arch/hlt.h>
#include <arch/io.h>
#include <bootmode.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
#include <device/pci_def.h>
+#include <halt.h>
#include <baytrail/gpio.h>
#include <soc/intel/common/mrc_cache.h>
#include <baytrail/iomap.h>
@@ -38,7 +38,7 @@
static void reset_system(void)
{
warm_reset();
- while(1) { hlt(); }
+ halt();
}
static void enable_smbus(void)