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authorAngel Pons <th3fanbus@gmail.com>2020-07-07 18:16:35 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-25 10:22:52 +0000
commitc5bcd28554ff0a1e5dda13742feb9024a195cb8b (patch)
treee5dee3b705bea29fe928eda9ba328abbf31fc30f /src/soc/intel/baytrail
parent5bcd35d6a5266d8894168ff24de6c23c751f0b14 (diff)
downloadcoreboot-c5bcd28554ff0a1e5dda13742feb9024a195cb8b.tar.xz
soc/intel/baytrail/smm.c: Align with Braswell
This reduces the differences between Bay Trail and Braswell. Tested with BUILD_TIMELESS=1, Google Ninja remains identical. Change-Id: Iaf557caac16b36e356a4fb1b05416718d86093bf Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43199 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail')
-rw-r--r--src/soc/intel/baytrail/smm.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/baytrail/smm.c b/src/soc/intel/baytrail/smm.c
index af85c8209e..3f3c53fa74 100644
--- a/src/soc/intel/baytrail/smm.c
+++ b/src/soc/intel/baytrail/smm.c
@@ -1,12 +1,12 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <device/device.h>
-#include <device/pci.h>
-#include <console/console.h>
#include <arch/io.h>
#include <device/mmio.h>
+#include <console/console.h>
#include <cpu/x86/smm.h>
#include <cpu/intel/smm_reloc.h>
+#include <device/device.h>
+#include <device/pci.h>
#include <soc/iomap.h>
#include <soc/pm.h>
#include <soc/smm.h>
@@ -60,9 +60,9 @@ static void smm_southcluster_route_gpios(void)
/* Enable SMIs for the gpios that are set to trigger the SMI. */
for (i = 0; i < 16; i++) {
- if ((route_reg & ROUTE_MASK) == ROUTE_SMI) {
+ if ((route_reg & ROUTE_MASK) == ROUTE_SMI)
alt_gpio_reg |= (1 << i);
- }
+
route_reg >>= 2;
}
printk(BIOS_DEBUG, "ALT_GPIO_SMI = %08x\n", alt_gpio_reg);