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authorElyes HAOUAS <ehaouas@noos.fr>2018-07-08 12:40:45 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-07-09 09:31:10 +0000
commit39303d5d4960814fc606cce3a9ec10545faaef4b (patch)
tree23e5acc814298022ac1c3314ceaae532d6303901 /src/soc/intel/baytrail
parentfd051dc018346e5947d9d8733e269fc5020236ba (diff)
downloadcoreboot-39303d5d4960814fc606cce3a9ec10545faaef4b.tar.xz
src/soc: Use "foo *bar" instead of "foo* bar"
Change-Id: I21680354f33916b7b4d913f51a842b5d6c2ecef3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27408 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/baytrail')
-rw-r--r--src/soc/intel/baytrail/include/soc/romstage.h2
-rw-r--r--src/soc/intel/baytrail/romstage/romstage.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/baytrail/include/soc/romstage.h b/src/soc/intel/baytrail/include/soc/romstage.h
index a3f1fc7dac..ba12c8f75a 100644
--- a/src/soc/intel/baytrail/include/soc/romstage.h
+++ b/src/soc/intel/baytrail/include/soc/romstage.h
@@ -31,7 +31,7 @@ struct romstage_params {
void mainboard_romstage_entry(struct romstage_params *params);
void romstage_common(struct romstage_params *params);
-void * asmlinkage romstage_main(unsigned long bist, uint32_t tsc_lo,
+void *asmlinkage romstage_main(unsigned long bist, uint32_t tsc_lo,
uint32_t tsc_high);
void asmlinkage romstage_after_car(void);
void raminit(struct mrc_params *mp, int prev_sleep_state);
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index e38957eaf0..c971b353df 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -98,7 +98,7 @@ static void spi_init(void)
}
/* Entry from cache-as-ram.inc. */
-void * asmlinkage romstage_main(unsigned long bist,
+void *asmlinkage romstage_main(unsigned long bist,
uint32_t tsc_low, uint32_t tsc_hi)
{
struct romstage_params rp = {