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| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-06-04 14:45:13 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-29 09:38:22 +0000 |
| commit | 56d913eedb2f4f0df0b2210f139d857a829bdf96 (patch) | |
| tree | e65099a8e855295bda9765823320dc4ec9562ee8 /src/soc/intel/braswell/Kconfig | |
| parent | 2d33c3e6c3ab2427377b9b532b6590aa87340c4e (diff) | |
| download | coreboot-56d913eedb2f4f0df0b2210f139d857a829bdf96.tar.xz | |
soc/intel/braswell: Use sb/intel/common/spi.c
This common implementation is compatible.
Change-Id: I540f73514f17d3b135c3222facfe23170d2bb0c8
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33205
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/braswell/Kconfig')
| -rw-r--r-- | src/soc/intel/braswell/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index f08b58982a..ba2ac68bf8 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -46,6 +46,7 @@ config CPU_SPECIFIC_OPTIONS select INTEL_GMA_SWSMISCI select CPU_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS + select SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT config DCACHE_BSP_STACK_SIZE hex |