diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2015-09-08 16:16:34 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-09-17 14:23:52 +0000 |
| commit | e73da80d2c63f14cdc301a2436cf9b93dc5a531f (patch) | |
| tree | efe173ba2c2485a11ea04af0a4c4e94df8292bfb /src/soc/intel/braswell/Kconfig | |
| parent | a1c8b34d7b1b3a8df5b86faab79010c06b037445 (diff) | |
| download | coreboot-e73da80d2c63f14cdc301a2436cf9b93dc5a531f.tar.xz | |
braswell: Switch to using common ACPI _SWS code
Switch braswell to use the common code for filling out the NVS
data used by ACPI _SWS methods. This code was out of date on
braswell so also update it to provide the \_GPE.SWS method.
BUG=chrome-os-partner:40635
BRANCH=none
TEST=emerge-cyan coreboot
Change-Id: I41c2a141c15f78dc0d9482954c157f81bd0759fa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4c4d1ee76f337addf687ca5a9ae2da5e898c2de0
Original-Change-Id: I44424784d5d3afb06d0d58c651a9339c7b77418c
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/298230
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11649
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/braswell/Kconfig')
| -rw-r--r-- | src/soc/intel/braswell/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 043dc1a43a..f76b9b244c 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -32,6 +32,7 @@ config CPU_SPECIFIC_OPTIONS select PLATFORM_USES_FSP1_1 select REG_SCRIPT select SOC_INTEL_COMMON + select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_FSP_RAM_INIT select SOC_INTEL_COMMON_FSP_ROMSTAGE select SOC_INTEL_COMMON_RESET |