diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2015-08-22 10:36:41 +0530 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-01-26 05:12:02 +0100 |
| commit | ed7275f2c34e17585c59ecbcabaa813afc20aac0 (patch) | |
| tree | bbc89ee3fa7b030a2a89e0886a13feccfcbdf337 /src/soc/intel/braswell/Makefile.inc | |
| parent | 2cfab90baa2eca04f6a522b65ce23650e5af56ff (diff) | |
| download | coreboot-ed7275f2c34e17585c59ecbcabaa813afc20aac0.tar.xz | |
Braswell: Implement Gpio library functions to read RAMID
Added GPIO library code to allow all BSW board specific code
to use memory configuration GPIOs in GPIO Input mode and read
them to determine which memory type is on the board.
Also added other GPIO related APIs to support GPIO access
in BSW.
Original-Reviewed-on: https://chromium-review.googlesource.com/294893
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Change-Id: Idd65136c0449f0cdebfae12a510985e29889fa2b
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/12735
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/braswell/Makefile.inc')
| -rw-r--r-- | src/soc/intel/braswell/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index b61323d36b..4a107ec48c 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -23,6 +23,7 @@ ramstage-y += gpio.c ifeq ($(CONFIG_GOP_SUPPORT),n) ramstage-y += gfx.c endif +ramstage-y += gpio_support.c ramstage-y += hda.c ramstage-y += iosf.c ramstage-y += lpe.c |